Searched refs:IP6_11_8 (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c125 #define GPSR3_10 F_(VI1_DATA6, IP6_11_8)
214 #define IP6_11_8 FM(VI1_DATA6) F_(0, 0) FM(RX4) FM(D9) FM(MMC_CLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
280 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
613 PINMUX_IPSR_GPSR(IP6_11_8, VI1_DATA6),
614 PINMUX_IPSR_GPSR(IP6_11_8, RX4),
615 PINMUX_IPSR_GPSR(IP6_11_8, D9),
616 PINMUX_IPSR_GPSR(IP6_11_8, MMC_CLK),
2298 IP6_11_8
H A Dpfc-r8a77990.c80 #define GPSR0_5 F_(D5, IP6_11_8)
266 #define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(0, 0) FM(LCDOUT21) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
397 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
872 PINMUX_IPSR_GPSR(IP6_11_8, D5),
873 PINMUX_IPSR_MSEL(IP6_11_8, RX3_A, SEL_SCIF3_0),
874 PINMUX_IPSR_MSEL(IP6_11_8, HRX3_B, SEL_HSCIF3_1),
875 PINMUX_IPSR_GPSR(IP6_11_8, DU_DR5),
876 PINMUX_IPSR_MSEL(IP6_11_8, VI4_DATA4_B, SEL_VIN4_1),
877 PINMUX_IPSR_GPSR(IP6_11_8, LCDOUT2
[all...]
H A Dpfc-r8a77980.c140 #define GPSR3_10 F_(VI1_DATA6, IP6_11_8)
248 #define IP6_11_8 FM(VI1_DATA6) F_(0, 0) F_(0, 0) FM(D9) FM(MMC_D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
330 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
690 PINMUX_IPSR_GPSR(IP6_11_8, VI1_DATA6),
691 PINMUX_IPSR_GPSR(IP6_11_8, D9),
692 PINMUX_IPSR_GPSR(IP6_11_8, MMC_D2),
2752 IP6_11_8
H A Dpfc-r8a77995.c109 #define GPSR2_13 F_(VI4_DATA12, IP6_11_8)
262 #define IP6_11_8 FM(VI4_DATA12) FM(TCLK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
371 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
724 PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA12),
725 PINMUX_IPSR_MSEL(IP6_11_8, TCLK1_A, SEL_TMU_1_0),
2739 IP6_11_8
H A Dpfc-r8a77951.c89 #define GPSR0_7 F_(D7, IP6_11_8)
306 #define IP6_11_8 FM(D7) FM(MSIOF2_TXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA23) FM(VI5_DATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
964 PINMUX_IPSR_GPSR(IP6_11_8, D7),
965 PINMUX_IPSR_MSEL(IP6_11_8, MSIOF2_TXD_B, SEL_MSIOF2_1),
966 PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA23),
967 PINMUX_IPSR_GPSR(IP6_11_8, VI5_DATA7),
5413 IP6_11_8
H A Dpfc-r8a77965.c94 #define GPSR0_7 F_(D7, IP6_11_8)
311 #define IP6_11_8 FM(D7) FM(MSIOF2_TXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA23) FM(VI5_DATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
970 PINMUX_IPSR_GPSR(IP6_11_8, D7),
971 PINMUX_IPSR_MSEL(IP6_11_8, MSIOF2_TXD_B, SEL_MSIOF2_1),
972 PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA23),
973 PINMUX_IPSR_GPSR(IP6_11_8, VI5_DATA7),
5609 IP6_11_8
H A Dpfc-r8a7796.c94 #define GPSR0_7 F_(D7, IP6_11_8)
311 #define IP6_11_8 FM(D7) FM(MSIOF2_TXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA23) FM(VI5_DATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
968 PINMUX_IPSR_GPSR(IP6_11_8, D7),
969 PINMUX_IPSR_MSEL(IP6_11_8, MSIOF2_TXD_B, SEL_MSIOF2_1),
970 PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA23),
971 PINMUX_IPSR_GPSR(IP6_11_8, VI5_DATA7),
5368 IP6_11_8
H A Dpfc-r8a77470.c745 PINMUX_IPSR_GPSR(IP6_11_8, DU0_DB1),
746 PINMUX_IPSR_MSEL(IP6_11_8, SDA4_D, SEL_I2C04_3),
747 PINMUX_IPSR_MSEL(IP6_11_8, CAN0_TX_C, SEL_CAN0_2),
748 PINMUX_IPSR_GPSR(IP6_11_8, A17),
2848 /* IP6_11_8 [4] */

Completed in 682 milliseconds