Searched refs:IP10_27_24 (Results 1 - 6 of 6) sorted by last modified time

/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a77995.c161 #define GPSR4_7 F_(SSI_WS4_A, IP10_27_24)
300 #define IP10_27_24 FM(SSI_WS4_A) FM(HRX0) FM(SDA2_A) FM(CAN1_TX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
384 FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \
862 PINMUX_IPSR_MSEL(IP10_27_24, SSI_WS4_A, SEL_SSIF4_0),
863 PINMUX_IPSR_GPSR(IP10_27_24, HRX0),
864 PINMUX_IPSR_MSEL(IP10_27_24, SDA2_A, SEL_I2C2_0),
865 PINMUX_IPSR_MSEL(IP10_27_24, CAN1_TX_B, SEL_CAN1_1),
2775 IP10_27_24
H A Dpfc-r8a77990.c144 #define GPSR3_12 F_(SD0_CD, IP10_27_24)
304 #define IP10_27_24 FM(SD0_CD) FM(NFALE_A) FM(SD3_CD) FM(RIF0_CLK_B) FM(SCL2_B) FM(TCLK1_A) FM(SSI_SCK2_B) FM(TS_SCK0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
410 FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \
1059 PINMUX_IPSR_GPSR(IP10_27_24, SD0_CD),
1060 PINMUX_IPSR_MSEL(IP10_27_24, NFALE_A, SEL_NDF_0),
1061 PINMUX_IPSR_GPSR(IP10_27_24, SD3_CD),
1062 PINMUX_IPSR_MSEL(IP10_27_24, RIF0_CLK_B, SEL_DRIF0_1),
1063 PINMUX_IPSR_MSEL(IP10_27_24, SCL2_B, SEL_I2C2_1),
1064 PINMUX_IPSR_MSEL(IP10_27_24, TCLK1_
[all...]
H A Dpfc-r8a77965.c173 #define GPSR4_14 F_(SD3_DAT5, IP10_27_24)
348 #define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
474 FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \
1148 PINMUX_IPSR_GPSR(IP10_27_24, SD3_DAT5),
1149 PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0),
1150 PINMUX_IPSR_GPSR(IP10_27_24, NFDATA5),
5647 IP10_27_24
H A Dpfc-r8a7796.c173 #define GPSR4_14 F_(SD3_DAT5, IP10_27_24)
348 #define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
474 FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \
1145 PINMUX_IPSR_GPSR(IP10_27_24, SD3_DAT5),
1146 PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0),
1147 PINMUX_IPSR_GPSR(IP10_27_24, NFDATA5),
5406 IP10_27_24
H A Dpfc-r8a77951.c168 #define GPSR4_14 F_(SD3_DAT5, IP10_27_24)
343 #define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
469 FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \
1142 PINMUX_IPSR_GPSR(IP10_27_24, SD3_DAT5),
1143 PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0),
1144 PINMUX_IPSR_GPSR(IP10_27_24, NFDATA5),
5451 IP10_27_24
H A Dpfc-r8a77470.c872 PINMUX_IPSR_MSEL(IP10_27_24, SDA0_A, SEL_I2C00_0),
873 PINMUX_IPSR_MSEL(IP10_27_24, TX0_C, SEL_SCIF0_2),
874 PINMUX_IPSR_GPSR(IP10_27_24, IRQ5),
875 PINMUX_IPSR_MSEL(IP10_27_24, CAN_CLK_A, SEL_CANCLK_0),
876 PINMUX_IPSR_GPSR(IP10_27_24, AVB_GTX_CLK),
877 PINMUX_IPSR_MSEL(IP10_27_24, CAN1_TX_D, SEL_CAN1_3),
878 PINMUX_IPSR_GPSR(IP10_27_24, DVC_MUTE),
2940 /* IP10_27_24 [4] */

Completed in 243 milliseconds