Searched refs:ICC_SRE_EL1_SRE (Results 1 - 7 of 7) sorted by relevance

/linux-master/tools/testing/selftests/kvm/include/aarch64/
H A Dgic_v3.h76 #define ICC_SRE_EL1_SRE (1U << 0) macro
/linux-master/include/linux/irqchip/
H A Darm-gic-v3.h578 #define ICC_SRE_EL1_SRE (1U << 0) macro
649 if (val & ICC_SRE_EL1_SRE)
652 val |= ICC_SRE_EL1_SRE;
656 return !!(val & ICC_SRE_EL1_SRE);
/linux-master/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic_v3.c316 write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE,
/linux-master/arch/arm64/kvm/
H A Dvgic-sys-reg-v3.c284 if (!(val & ICC_SRE_EL1_SRE))
/linux-master/arch/arm64/kvm/hyp/nvhe/
H A Dsys_regs.c310 p->regval = ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB | ICC_SRE_EL1_SRE;
/linux-master/arch/arm64/kvm/vgic/
H A Dvgic-v3.c280 ICC_SRE_EL1_SRE);
/linux-master/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c452 val = (val & ICC_SRE_EL1_SRE) ? 0 : (1ULL << 63);

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