Searched refs:HDMI_ACR_48_1 (Results 1 - 16 of 16) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h82 SRI(HDMI_ACR_48_1, DIG, id),\
187 SE_SF(HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\
683 uint32_t HDMI_ACR_48_1; member in struct:dce110_stream_enc_registers
H A Ddce_stream_encoder.c1314 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h106 SRI_ARR(HDMI_ACR_48_1, DIG, id),\
/linux-master/drivers/gpu/drm/radeon/
H A Devergreen_hdmi.c96 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz);
H A Drv770d.h797 #define HDMI_ACR_48_1 0x74c0 macro
H A Devergreend.h651 #define HDMI_ACR_48_1 0x70f0 macro
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h73 SRI(HDMI_ACR_48_1, DIG, id),\
167 uint32_t HDMI_ACR_48_1; member in struct:dcn10_stream_enc_registers
H A Ddcn10_stream_encoder.c1301 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.h75 SRI(HDMI_ACR_48_1, DIG, id),\
H A Ddcn30_dio_stream_encoder.c809 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.h76 SRI(HDMI_ACR_48_1, DIG, id),\
/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_dio_stream_encoder.h75 SRI(HDMI_ACR_48_1, DIG, id),\
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h278 SRI_ARR(HDMI_ACR_48_0, DIG, id), SRI_ARR(HDMI_ACR_48_1, DIG, id), \
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v11_0.c1558 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);
H A Ddce_v10_0.c1509 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);
H A Ddce_v6_0.c1460 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);

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