Searched refs:GPR_A0 (Results 1 - 5 of 5) sorted by relevance
| /linux-master/arch/mips/mm/ |
| H A D | page.c | 224 uasm_i_sd(buf, GPR_ZERO, off, GPR_A0);
226 uasm_i_sw(buf, GPR_ZERO, off, GPR_A0);
237 GPR_A0);
240 uasm_i_cache(buf, Create_Dirty_Excl_SD, off, GPR_A0);
254 uasm_i_cache(buf, Create_Dirty_Excl_D, off, GPR_A0);
292 pg_addiu(&buf, GPR_A2, GPR_A0, off);
294 uasm_i_ori(&buf, GPR_A2, GPR_A0, off);
311 pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
316 uasm_il_bne(&buf, &r, GPR_A0, GPR_A
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| /linux-master/arch/mips/include/asm/ |
| H A D | regdef.h | 26 #define GPR_A0 4 /* argument registers */ macro
69 #define GPR_A0 4 /* argument registers */ macro
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| /linux-master/arch/mips/kvm/ |
| H A D | entry.c | 162 * GPR_A0: vcpu
181 UASM_i_MTC0(&p, GPR_A0, scratch_vcpu[0], scratch_vcpu[1]);
184 UASM_i_ADDIU(&p, GPR_K1, GPR_A0, offsetof(struct kvm_vcpu, arch));
266 UASM_i_LW(&p, GPR_A0, offsetof(struct kvm, arch.gpa_mm.pgd), GPR_S0);
271 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);
646 UASM_i_LW(&p, GPR_A0,
652 UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);
716 uasm_i_move(&p, GPR_A0, GPR_S0);
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| /linux-master/arch/mips/kernel/ |
| H A D | smp-cps.c | 82 uasm_i_ori(&p, GPR_A0, 0, read_c0_config() & CONF_CM_CMASK);
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| H A D | pm-cps.c | 341 const unsigned r_online = GPR_A0;
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