Searched refs:GPCPLL_CFG (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgk20a.h35 #define GPCPLL_CFG (SYS_GPCPLL_CFG_BASE + 0) macro
138 val = nvkm_rd32(device, GPCPLL_CFG);
H A Dgk20a.c261 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, GPCPLL_CFG_ENABLE);
262 nvkm_rd32(device, GPCPLL_CFG);
265 val = nvkm_rd32(device, GPCPLL_CFG);
268 nvkm_wr32(device, GPCPLL_CFG, val);
272 if (nvkm_wait_usec(device, 300, GPCPLL_CFG, GPCPLL_CFG_LOCK,
291 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, 0);
292 nvkm_rd32(device, GPCPLL_CFG);
561 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 1);
573 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 0);
574 nvkm_rd32(device, GPCPLL_CFG);
[all...]
H A Dgm20b.c326 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, GPCPLL_CFG_ENABLE);
327 nvkm_rd32(device, GPCPLL_CFG);
333 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_SYNC_MODE,
335 nvkm_rd32(device, GPCPLL_CFG);
353 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_SYNC_MODE, 0);
355 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, 0);
356 nvkm_rd32(device, GPCPLL_CFG);
738 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 1);
820 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 0);
821 nvkm_rd32(device, GPCPLL_CFG);
[all...]

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