Searched refs:G1_REG_PP_DEV_CONFIG (Results 1 - 2 of 2) sorted by relevance
| /linux-master/drivers/media/platform/verisilicon/ |
| H A D | hantro_postproc.c | 40 .max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f},
41 .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1},
42 .out_swap32 = {G1_REG_PP_DEV_CONFIG, 5, 0x1},
43 .out_endian = {G1_REG_PP_DEV_CONFIG, 6, 0x1},
|
| H A D | hantro_g1_regs.h | 312 #define G1_REG_PP_DEV_CONFIG G1_SWREG(61) macro
|
Completed in 209 milliseconds