Searched refs:G1_REG_FWD_PIC (Results 1 - 3 of 3) sorted by path

/linux-master/drivers/media/platform/verisilicon/
H A Dhantro_g1_h264_dec.c183 * Each G1_REG_FWD_PIC(x) register contains six consecutive
194 vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(reg_num++));
H A Dhantro_g1_regs.h205 #define G1_REG_FWD_PIC(i) (0x028 + ((i) * 0x4)) macro
H A Dhantro_g1_vp8_dec.c426 vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(0));

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