Searched refs:EVERGREEN_CRTC4_REGISTER_OFFSET (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/radeon/
H A Devergreen_reg.h228 #define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0) macro
H A Dradeon_display.c1507 EVERGREEN_CRTC4_REGISTER_OFFSET,
1855 EVERGREEN_CRTC4_REGISTER_OFFSET);
1857 EVERGREEN_CRTC4_REGISTER_OFFSET);
H A Dcik.c6888 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
6901 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
7240 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5);
7257 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
7309 EVERGREEN_CRTC4_REGISTER_OFFSET);
7348 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
7354 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);
7356 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK);
H A Dradeon_device.c683 reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) |
H A Devergreen_cs.c1032 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC4_REGISTER_OFFSET,
1040 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
H A Datombios_crtc.c2246 radeon_crtc->crtc_offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
H A Dsi.c146 EVERGREEN_CRTC4_REGISTER_OFFSET,
H A Devergreen.c129 EVERGREEN_CRTC4_REGISTER_OFFSET,

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