/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUGlobalISelUtils.cpp | 18 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); local 19 if (!Def) 22 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { 24 const MachineOperand &Op = Def->getOperand(1); 30 return std::make_tuple(Register(), Offset, Def); 34 if (Def->getOpcode() == TargetOpcode::G_ADD) { 36 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) 37 return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); 40 if (mi_match(Def [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyLowerBrUnless.cpp | 77 MachineInstr *Def = MRI.getVRegDef(Cond); local 78 switch (Def->getOpcode()) { 81 Def->setDesc(TII.get(NE_I32)); 85 Def->setDesc(TII.get(EQ_I32)); 89 Def->setDesc(TII.get(LE_S_I32)); 93 Def->setDesc(TII.get(LT_S_I32)); 97 Def->setDesc(TII.get(GE_S_I32)); 101 Def->setDesc(TII.get(GT_S_I32)); 105 Def->setDesc(TII.get(LE_U_I32)); 109 Def [all...] |
H A D | WebAssemblyRegStackify.cpp | 260 // Test whether Def is safe and profitable to rematerialize. 261 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, argument 263 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); 273 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) 274 return Def; 276 // MRI doesn't know what the Def is. Try asking LIS. 284 // Test whether Reg, as defined at Def, has exactly one use. This is a 287 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, argument 296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def) 316 isSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, AliasAnalysis &AA, const MachineRegisterInfo &MRI) argument 483 moveForSingleUse(unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI) argument 528 rematerializeCheapDef( unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) argument 596 moveAndTeeForMultiUse( unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) argument 818 MachineInstr *Def = getVRegDef(Reg, Insert, MRI, LIS); local [all...] |
H A D | WebAssemblyRegisterInfo.cpp | 96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); local 100 if (Def && Def->getOpcode() == WebAssembly::CONST_I32 && 101 MRI.hasOneNonDBGUse(Def->getOperand(0).getReg())) { 102 MachineOperand &ImmMO = Def->getOperand(1);
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H A D | WebAssemblyPrepareForLiveIntervals.cpp | 66 for (const auto &Def : MRI.def_instructions(Reg)) 67 if (WebAssembly::isArgument(Def.getOpcode()))
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | ExegesisEmitter.cpp | 52 void emitPfmCountersInfo(const Record &Def, 74 for (Record *Def : Records.getAllDerivedDefinitions("ProcPfmCounters")) { 78 Def->getValueAsListOfDefs("IssueCounters")) { 88 AddPfmCounterName(Def->getValueAsDef("CycleCounter")); 89 AddPfmCounterName(Def->getValueAsDef("UopsCounter")); 107 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def, argument 111 Def.getValueAsDef("CycleCounter")->getValueAsString("Counter"); 113 Def.getValueAsDef("UopsCounter")->getValueAsString("Counter"); 115 Def.getValueAsListOfDefs("IssueCounters").size(); 117 OS << "\nstatic const PfmCountersInfo " << Target << Def [all...] |
H A D | WebAssemblyDisassemblerEmitter.cpp | 33 auto &Def = *CGI.TheDef; local 34 if (!Def.getValue("Inst")) 36 auto &Inst = *Def.getValueAsBitsInit("Inst"); 49 Def.getValue("StackBased")->getValue()->getCastTo(StringRecTy::get()); 67 Def.getValue("IsCanonical")->getValue()->getAsString() == "1";
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H A D | CodeGenSchedule.h | 59 CodeGenSchedRW(unsigned Idx, Record *Def) argument 60 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { 61 Name = Def->getName(); 62 IsRead = Def->isSubClassOf("SchedRead"); 63 HasVariants = Def->isSubClassOf("SchedVariant"); 65 IsVariadic = Def->getValueAsBit("Variadic"); 70 IsSequence = Def->isSubClassOf("WriteSequence"); 390 void addDefinition(const Record *Def) { Definitions.push_back(Def); } argument 520 CodeGenSchedRW &getSchedRW(Record *Def) { [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/WindowsManifest/ |
H A D | WindowsManifestMerger.cpp | 127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { 128 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { 129 return Def; 155 if (xmlNsPtr Def = search(HRef, Node)) 156 return Def; 157 if (xmlNsPtr Def [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | PeepholeOptimizer.cpp | 181 /// Track Def -> Use info used for rewriting copies. 255 RegSubRegPair Def, RewriteMapTy &RewriteMap); 367 const MachineInstr *Def = nullptr; 369 /// The index of the definition in Def. 423 Def = MRI.getVRegDef(Reg); 652 /// retrieve all Def -> Use along the way up to the next source. Any found 692 // Insert the Def -> Use entry for the recently found source. 1105 /// Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find 1107 /// multiple sources for a given \p Def ar 1112 getNewSource(MachineRegisterInfo *MRI, const TargetInstrInfo *TII, RegSubRegPair Def, const PeepholeOptimizer::RewriteMapTy &RewriteMap, bool HandleMultipleSources = true) argument 1223 rewriteSource(MachineInstr &CopyLike, RegSubRegPair Def, RewriteMapTy &RewriteMap) argument 1279 RegSubRegPair Def; local 1666 const auto &Def = NAPhysToVirtMIs.find(Reg); local 1678 unsigned Def = RegMI.first; local [all...] |
H A D | ReachingDefAnalysis.cpp | 1 //===---- ReachingDefAnalysis.cpp - Reaching Def Analysis ---*- C++ -*-----===// 87 // While processing the basic block, we kept `Def` relative to the start 181 for (int Def : MBBReachingDefs[MBBNumber][*Unit]) { 182 if (Def >= InstId) 184 DefRes = Def; 227 void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, int PhysReg, 229 MachineBasicBlock *MBB = Def->getParent(); 230 MachineBasicBlock::iterator MI = MachineBasicBlock::iterator(Def); 233 // of 'Def'. 234 if (getReachingMIDef(&*MI, PhysReg) != Def) [all...] |
H A D | DetectDeadLanes.cpp | 90 /// operand \p Def. 91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum, 252 const MachineOperand &Def = MI.getOperand(0); local 253 Register DefReg = Def.getReg(); 283 // FIXME: PATCHPOINT instructions announce a Def that does not always exist, 287 const MachineOperand &Def = *MI.defs().begin(); local 288 Register DefReg = Def.getReg(); 298 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes); 310 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, argument 312 const MachineInstr &MI = *Def 358 const MachineOperand &Def = *MRI->def_begin(Reg); local 430 const MachineOperand &Def = *UseMI.defs().begin(); local 472 const MachineOperand &Def = MI.getOperand(0); local 514 MachineOperand &Def = *MRI->def_begin(Reg); local [all...] |
H A D | MachineCopyPropagation.cpp | 155 Register Def = MI->getOperand(0).getReg(); local 158 // Remember Def is defined by the copy. 159 for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI) 162 // Remember source that's copied to Def. Once it's clobbered, then 167 if (!is_contained(Copy.DefRegs, Def)) 168 Copy.DefRegs.push_back(Def); 280 bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def); 327 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def. 329 /// all even though Src and Def are subregisters of the registers used in 334 unsigned Def, cons 333 isNopCopy(const MachineInstr &PreviousCopy, unsigned Src, unsigned Def, const TargetRegisterInfo *TRI) argument 350 eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def) argument 387 Register Def = Copy.getOperand(0).getReg(); local 564 Register Def = MI->getOperand(0).getReg(); local 736 Register Def = MI.getOperand(0).getReg(); local 775 Register Def = Copy->getOperand(0).getReg(); local 816 Register Def = MI->getOperand(0).getReg(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/ToolDrivers/llvm-dlltool/ |
H A D | DlltoolDriver.cpp | 131 Expected<COFFModuleDefinition> Def = local 134 if (!Def) { 136 << errorToErrorCode(Def.takeError()).message(); 142 Def->OutputFile = Arg->getValue(); 144 if (Def->OutputFile.empty()) { 156 for (COFFShortExport& E : Def->Exports) { 164 for (COFFShortExport& E : Def->Exports) { 181 writeImportLibrary(Def->OutputFile, Path, Def->Exports, Machine, true))
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | MVEVPTBlockPass.cpp | 78 auto *Def = RDA->getReachingMIDef(MI, ARM::VPR); local 79 if (!Def) 82 // Now check that Def is a VCMP 83 if (!(NewOpcode = VCMPOpcodeToVPT(Def->getOpcode()))) 86 // Check that Def's operands are not defined between the VCMP and MI, i.e. 88 if (!RDA->hasSameReachingDef(Def, MI, Def->getOperand(1).getReg()) || 89 !RDA->hasSameReachingDef(Def, MI, Def->getOperand(2).getReg())) 92 return Def; [all...] |
H A D | A15SDOptimizer.cpp | 201 MachineInstr *Def = Op->getParent(); local 205 if (DeadInstr.find(Def) != DeadInstr.end()) 212 for (MachineOperand &MODef : Def->operands()) { 222 if (&Use == Def) 233 LLVM_DEBUG(dbgs() << "Deleting instruction " << *Def << "\n"); 234 DeadInstr.insert(Def); 303 MachineInstr *Def = MRI->getVRegDef(OpReg); local 304 if (!Def) 306 if (Def->isImplicitDef()) 346 MachineInstr *Def 606 MachineInstr *Def = MRI->getVRegDef(*I); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/ |
H A D | Instruction.cpp | 196 if (!all_of(getDefs(), [](const WriteState &Def) { return Def.isReady(); })) 213 [](const WriteState &Def) { return !Def.getDependentWrite(); })) 235 for (WriteState &Def : getDefs()) 236 Def.cycleEvent(); 244 for (WriteState &Def : getDefs()) 245 Def.cycleEvent();
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/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/fuzzer/ |
H A D | FuzzerExtFunctionsWindows.cpp | 48 RETURN_TYPE NAME##Def FUNC_SIG { \ 52 EXTERNAL_FUNC(NAME, NAME##Def) RETURN_TYPE NAME FUNC_SIG 73 this->NAME = GetFnPtr<decltype(::NAME)>(::NAME, ::NAME##Def, #NAME, WARN);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 209 MachineRegisterInfo::def_instr_iterator Def = local 211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); 212 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); 222 MachineRegisterInfo::def_instr_iterator Def = local 224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); 225 MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1); 302 MachineRegisterInfo::def_instr_iterator Def = local 304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); 305 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); 315 Def 321 MachineRegisterInfo::def_instr_iterator Def = local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | Dominators.cpp | 113 // dominates - Return true if Def dominates a use in User. This performs 114 // the special checks necessary if Def and User are in the same basic block. 115 // Note that Def doesn't dominate a use in Def itself! 116 bool DominatorTree::dominates(const Instruction *Def, argument 119 const BasicBlock *DefBB = Def->getParent(); 121 // Any unreachable use is dominated, even if Def == User. 130 if (Def == User) 137 if (isa<InvokeInst>(Def) || isa<PHINode>(User)) 138 return dominates(Def, UseB 153 dominates(const Instruction *Def, const BasicBlock *UseBB) const argument 249 dominates(const Instruction *Def, const Use &U) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/Lex/ |
H A D | MacroInfo.cpp | 205 for (DefInfo Def = getDefinition(); Def; Def = Def.getPreviousDefinition()) { 206 if (Def.getLocation().isInvalid() || // For macros defined on the command line. 207 SM.isBeforeInTranslationUnit(Def.getLocation(), L)) 208 return (!Def.isUndefined() || 209 SM.isBeforeInTranslationUnit(L, Def.getUndefLocation())) 210 ? Def : DefInfo();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/TableGen/ |
H A D | JSONBackend.cpp | 79 if (auto *Def = dyn_cast<DefInit>(&I)) { 81 obj["def"] = Def->getDef()->getName(); 142 auto &Def = *D.second; local 147 for (const RecordVal &RV : Def.getValues()) { 148 if (!Def.isTemplateArg(RV.getNameInit())) { 159 for (const auto &SuperPair : Def.getSuperClasses()) 164 obj["!anonymous"] = Def.isAnonymous(); 169 for (const auto &SuperPair : Def.getSuperClasses()) {
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | Localizer.h | 58 /// Check if \p MOUse is used in the same basic block as \p Def. 61 /// block when to insert \p Def to have a local use. 62 static bool isLocalUse(MachineOperand &MOUse, const MachineInstr &Def,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | PredicateInfo.cpp | 103 // Only one of Def or Use will be set. 104 Value *Def = nullptr; member in struct:llvm::PredicateInfoClasses::ValueDFS 153 bool isADef = A.Def; 154 bool isBDef = B.Def; 164 if (!VD.Def && VD.U) { 197 bool isADef = A.Def; 198 bool isBDef = B.Def; 199 assert((!A.Def || !A.U) && (!B.Def || !B.U) && 200 "Def an 227 getDefOrUser(const Value *Def, const Use *U) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86WinAllocaExpander.cpp | 85 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); local 87 if (!Def || 88 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) || 89 !Def->getOperand(1).isImm()) 92 return Def->getOperand(1).getImm();
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