Searched refs:DP_DPHY_CNTL (Results 1 - 8 of 8) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_link_encoder.c | 178 REG_UPDATE(DP_DPHY_CNTL, DPHY_FEC_EN, enable);
185 REG_UPDATE(DP_DPHY_CNTL, DPHY_FEC_READY_SHADOW, ready);
193 REG_GET(DP_DPHY_CNTL, DPHY_FEC_ACTIVE_STATUS, &active);
205 REG_GET(DP_DPHY_CNTL, DPHY_FEC_EN, &s->dphy_fec_en);
206 REG_GET(DP_DPHY_CNTL, DPHY_FEC_READY_SHADOW, &s->dphy_fec_ready_shadow);
207 REG_GET(DP_DPHY_CNTL, DPHY_FEC_ACTIVE_STATUS, &s->dphy_fec_active_status);
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_link_encoder.h | 37 SRI(DP_DPHY_CNTL, DP, id), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_dio_link_encoder.h | 38 SRI(DP_DPHY_CNTL, DP, id), \
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.h | 55 SRI(DP_DPHY_CNTL, DP, id), \
89 SRI(DP_DPHY_CNTL, DP, id), \
164 uint32_t DP_DPHY_CNTL; member in struct:dce110_link_enc_registers
|
| H A D | dce_link_encoder.c | 141 REG_UPDATE(DP_DPHY_CNTL, DPHY_BYPASS, enable);
152 REG_UPDATE_4(DP_DPHY_CNTL,
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.h | 48 SRI(DP_DPHY_CNTL, DP, id), \
89 uint32_t DP_DPHY_CNTL; member in struct:dcn10_link_enc_registers
|
| H A D | dcn10_link_encoder.c | 112 REG_UPDATE(DP_DPHY_CNTL, DPHY_BYPASS, enable);
123 REG_UPDATE_4(DP_DPHY_CNTL,
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 319 SRI_ARR(DP_DPHY_CNTL, DP, id), SRI_ARR(DP_DPHY_PRBS_CNTL, DP, id), \
|
Completed in 140 milliseconds