Searched refs:DP_CONFIG (Results 1 - 8 of 8) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_link_encoder.h | 36 SRI(DP_CONFIG, DP, id), \
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_dio_link_encoder.h | 37 SRI(DP_CONFIG, DP, id), \
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| /linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.h | 54 SRI(DP_CONFIG, DP, id), \
88 SRI(DP_CONFIG, DP, id), \
163 uint32_t DP_CONFIG; member in struct:dce110_link_enc_registers
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| H A D | dce_link_encoder.c | 603 REG_SET(DP_CONFIG, 0,
617 REG_SET(DP_CONFIG, 0,
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| /linux-master/drivers/mtd/nand/ |
| H A D | ecc-mxic.c | 27 #define DP_CONFIG 0x00 macro
178 reg = readl(mxic->regs + DP_CONFIG);
180 writel(reg, mxic->regs + DP_CONFIG);
187 reg = readl(mxic->regs + DP_CONFIG);
189 writel(reg, mxic->regs + DP_CONFIG);
298 writel(ECC_TYP(idx), mxic->regs + DP_CONFIG);
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.h | 47 SRI(DP_CONFIG, DP, id), \
88 uint32_t DP_CONFIG; member in struct:dcn10_link_enc_registers
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| H A D | dcn10_link_encoder.c | 491 REG_SET(DP_CONFIG, 0,
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| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 318 SRI_ARR(TMDS_DCBALANCER_CONTROL, DIG, id), SRI_ARR(DP_CONFIG, DP, id), \
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