/linux-master/arch/x86/crypto/ |
H A D | poly1305-x86_64-cryptogams.pl | 419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) = 880 vmovdqu `16*3`($ctx),$D4 # preload r0^2 911 vpshufd \$0xEE,$D4,$D3 # 34xx -> 3434 912 vpshufd \$0x44,$D4,$D0 # xx12 -> 1212 915 vpshufd \$0xEE,$D1,$D4 918 vmovdqa $D4,-0x80(%r11) 925 vpshufd \$0xEE,$D0,$D4 928 vmovdqa $D4,-0x60(%r11) 935 vpshufd \$0xEE,$D2,$D4 938 vmovdqa $D4, [all...] |
/linux-master/arch/arm/crypto/ |
H A D | poly1305-armv4.pl | 496 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14)); 558 vmull.u32 $D4,$R4,${R0}[1] 564 vmlal.u32 $D4,$R3,${R1}[1] 570 vmlal.u32 $D4,$R2,${R2}[1] 576 vmlal.u32 $D4,$R1,${R3}[1] 582 vmlal.u32 $D4,$R0,${R4}[1] 637 vadd.i64 $D4,$D4,$T0 @ h3 -> h4 642 vshrn.u64 $T0#lo,$D4,#26 643 vmovn.i64 $D4#l [all...] |
/linux-master/lib/842/ |
H A D | 842_decompress.c | 23 { D4, D2, I2, N0 }, 24 { D4, I2, D2, N0 }, 25 { D4, I2, I2, N0 }, 26 { D4, I4, N0, N0 }, 27 { D2, I2, D4, N0 }, 32 { I2, D2, D4, N0 }, 33 { I2, D4, I2, N0 }, 37 { I2, I2, D4, N0 }, 42 { I4, D4, N0, N0 },
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H A D | 842.h | 27 * "Data" actions, indicated in the table by D2, D4, and D8, mean that the 120 #define D4 (OP_ACTION_DATA | OP_AMOUNT_4) macro
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H A D | 842_compress.c | 52 { I4, D4, N0, N0, 0x14 }, /* 41 */ 53 { D4, I4, N0, N0, 0x04 }, /* 41 */ 54 { I2, I2, D4, N0, 0x0f }, /* 48 */ 56 { I2, D4, I2, N0, 0x0b }, /* 48 */ 59 { D4, I2, I2, N0, 0x03 }, /* 48 */ 60 { I2, D2, D4, N0, 0x0a }, /* 56 */ 61 { D2, I2, D4, N0, 0x05 }, /* 56 */ 62 { D4, I2, D2, N0, 0x02 }, /* 56 */ 63 { D4, D2, I2, N0, 0x01 }, /* 56 */
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/linux-master/arch/s390/crypto/ |
H A D | chacha-s390.S | 463 #define D4 %v19 define 511 VAF D4,D2,T2 # K[3]+4 536 VX D4,D4,A4 542 VERLLF D4,D4,16 549 VAF C4,C4,D4 574 VX D4,D4,A4 580 VERLLF D4,D [all...] |
/linux-master/lib/zstd/decompress/ |
H A D | huf_decompress.c | 284 U64 D4; local 286 D4 = (symbol << 8) + nbBits; 288 D4 = symbol + (nbBits << 8); 290 D4 *= 0x0001000100010001ULL; 291 return D4; 442 U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits); local 443 MEM_write64(dt + uStart, D4); 449 U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits); local 450 MEM_write64(dt + uStart, D4); 451 MEM_write64(dt + uStart + 4, D4); 457 U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits); local [all...] |
/linux-master/arch/m68k/fpsp040/ |
H A D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y| 133 subl %d6,%d3 | ...(D3,D4,D5) is normalized 147 orl %d7,%d4 | ...(D3,D4,D5) normalized 152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized 226 |..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
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/linux-master/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed-g5.c | 1218 #define D4 163 macro 1219 SIG_EXPR_LIST_DECL_SINGLE(D4, GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11)); 1220 SIG_EXPR_LIST_DECL_SINGLE(D4, RMII2DASH1, RMII2, RMII2_DESC); 1221 SIG_EXPR_LIST_DECL_SINGLE(D4, RGMII2TXD3, RGMII2); 1222 PIN_DECL_(D4, SIG_EXPR_LIST_PTR(D4, GPIOU3), SIG_EXPR_LIST_PTR(D4, RMII2DASH1), 1223 SIG_EXPR_LIST_PTR(D4, RGMII2TXD3)); 1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6); 1988 ASPEED_PINCTRL_PIN(D4), [all...] |
H A D | pinctrl-aspeed-g4.c | 197 #define D4 20 macro 198 SIG_EXPR_LIST_DECL_SINGLE(D4, SD1DAT2, SD1, SD1_DESC); 199 SIG_EXPR_LIST_DECL_SINGLE(D4, SCL12, I2C12, I2C12_DESC); 200 PIN_DECL_2(D4, GPIOC4, SD1DAT2, SCL12); 207 FUNC_GROUP_DECL(I2C12, D4, C3); 222 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1); 1998 ASPEED_PINCTRL_PIN(D4),
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H A D | pinctrl-aspeed-g6.c | 1379 #define D4 220 macro 1380 SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12), 1382 SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12), 1384 PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO); 1457 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1); 1458 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1); 1802 ASPEED_PINCTRL_PIN(D4),
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/linux-master/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 209 #define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 589 PINMUX_IPSR_GPSR(IP5_23_20, D4),
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H A D | pfc-r8a77990.c | 81 #define GPSR0_4 F_(D4, IP6_7_4) 265 #define IP6_7_4 FM(D4) FM(CANFD1_TX) FM(HSCK3_B) FM(CAN1_TX) FM(RTS3_N_A) FM(MSIOF3_SS2_A) F_(0, 0) FM(VI5_DATA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 864 PINMUX_IPSR_GPSR(IP6_7_4, D4), 5112 [0] = RCAR_GP_PIN(0, 4), /* D4 */
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H A D | pfc-sh7734.c | 738 PINMUX_IPSR_GPSR(IP2_2_0, D4), 1419 GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),
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H A D | pfc-r8a77980.c | 243 #define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 667 PINMUX_IPSR_GPSR(IP5_23_20, D4),
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H A D | pfc-r8a77951.c | 92 #define GPSR0_4 F_(D4, IP5_31_28) 303 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 948 PINMUX_IPSR_GPSR(IP5_31_28, D4), 5714 { RCAR_GP_PIN(0, 4), 4, 3 }, /* D4 */ 5977 [14] = RCAR_GP_PIN(0, 4), /* D4 */
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H A D | pfc-r8a77965.c | 97 #define GPSR0_4 F_(D4, IP5_31_28) 308 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 954 PINMUX_IPSR_GPSR(IP5_31_28, D4), 5910 { RCAR_GP_PIN(0, 4), 4, 3 }, /* D4 */ 6170 [14] = RCAR_GP_PIN(0, 4), /* D4 */
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H A D | pfc-r8a7796.c | 97 #define GPSR0_4 F_(D4, IP5_31_28) 308 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 952 PINMUX_IPSR_GPSR(IP5_31_28, D4), 5669 { RCAR_GP_PIN(0, 4), 4, 3 }, /* D4 */ 5929 [14] = RCAR_GP_PIN(0, 4), /* D4 */
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H A D | pfc-r8a73a4.c | 358 F1(D4), F2(VIO_D4), F5(GIO_OUT4_218),
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H A D | pfc-sh7264.c | 1299 GPIO_FN(D4),
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H A D | pfc-r8a7792.c | 361 PINMUX_SINGLE(D4), 2705 [ 4] = RCAR_GP_PIN(2, 4), /* D4 */
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H A D | pfc-r8a779a0.c | 397 #define IP0SR2_15_12 FM(GP2_03) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) 950 PINMUX_IPSR_MSEL(IP0SR2_15_12, D4, SEL_I2C0_0),
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H A D | pfc-r8a77470.c | 604 PINMUX_IPSR_GPSR(IP1_27_24, D4), 3376 [28] = RCAR_GP_PIN(1, 4), /* D4 */
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H A D | pfc-sh7269.c | 1737 GPIO_FN(D4),
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/linux-master/arch/m68k/ifpsp060/src/ |
H A D | fplsp.S | 8392 mov.l 8(%a0),%d5 # (D4,D5) is (Hi_X,Lo_X) 8405 add.l %d6,%d2 # (D3,D4,D5) is normalized 8427 or.l %d7,%d4 # (D3,D4,D5) normalized 9440 mov.l SRC_LO(%a0),%d5 # (D3,D4,D5) is |Y| 9456 sub.l %d6,%d3 # (D3,D4,D5) is normalized 9470 or.l %d7,%d4 # (D3,D4,D5) normalized 9475 add.l &0x00003FFE,%d3 # (D3,D4,D5) normalized 9549 #..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
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