Searched refs:D3 (Results 1 - 25 of 31) sorted by relevance

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/linux-master/arch/arm/crypto/
H A Dpoly1305-armv4.pl496 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));
557 vmull.u32 $D3,$R3,${R0}[1]
563 vmlal.u32 $D3,$R2,${R1}[1]
568 vmlal.u32 $D3,$R1,${R2}[1]
573 vmlal.u32 $D3,$R0,${R3}[1]
578 vmlal.u32 $D3,$R4,${S4}[1]
633 vshr.u64 $T0,$D3,#26
634 vmovn.i64 $D3#lo,$D3
638 vbic.i32 $D3#l
[all...]
/linux-master/arch/s390/crypto/
H A Dchacha-s390.S458 #define D3 %v15 define
510 VAF D3,K3,T3 # K[3]+3
523 VLR T3,D3
535 VX D3,D3,A3
541 VERLLF D3,D3,16
548 VAF C3,C3,D3
573 VX D3,D3,A
[all...]
/linux-master/arch/x86/crypto/
H A Dpoly1305-x86_64-cryptogams.pl419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
911 vpshufd \$0xEE,$D4,$D3 # 34xx -> 3434
913 vmovdqa $D3,-0x90(%r11)
920 vpshufd \$0xEE,$D2,$D3
923 vmovdqa $D3,-0x70(%r11)
930 vpshufd \$0xEE,$D1,$D3
933 vmovdqa $D3,-0x50(%r11)
940 vpshufd \$0xEE,$D0,$D3
943 vmovdqa $D3,-0x30(%r11)
949 vpshufd \$0xEE,$D2,$D3
[all...]
/linux-master/drivers/gpu/drm/xe/
H A Dxe_step_types.h36 func(D3) \
/linux-master/drivers/gpu/drm/i915/
H A Dintel_step.h42 func(D3) \
/linux-master/arch/m68k/fpsp040/
H A Dsrem_mod.S117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y|
133 subl %d6,%d3 | ...(D3,D4,D5) is normalized
147 orl %d7,%d4 | ...(D3,D4,D5) normalized
152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized
207 clrl %d3 | ...D3 is Q
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g6.c1400 #define D3 223 macro
1401 SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1403 SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1405 PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1457 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1458 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1801 ASPEED_PINCTRL_PIN(D3),
2622 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1),
2623 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D3, SCU40C, 1),
H A Dpinctrl-aspeed-g4.c1056 #define D3 128 macro
1057 SIG_EXPR_LIST_DECL_SINGLE(D3, SCL3, I2C3, I2C3_DESC);
1058 PIN_DECL_1(D3, GPIOQ0, SCL3);
1064 FUNC_GROUP_DECL(I2C3, D3, C2);
1997 ASPEED_PINCTRL_PIN(D3),
/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c208 #define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
585 PINMUX_IPSR_GPSR(IP5_19_16, D3),
H A Dpfc-r8a77990.c82 #define GPSR0_3 F_(D3, IP6_3_0)
264 #define IP6_3_0 FM(D3) FM(MSIOF3_TXD_A) FM(TX5_C) F_(0, 0) FM(VI5_DATA15_A) FM(DU_DR4) FM(TX4_C) F_(0, 0) FM(LCDOUT20) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
856 PINMUX_IPSR_GPSR(IP6_3_0, D3),
5113 [1] = RCAR_GP_PIN(0, 3), /* D3 */
H A Dpfc-sh7734.c731 PINMUX_IPSR_GPSR(IP1_31_29, D3),
1415 GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A),
H A Dpfc-r8a77980.c242 #define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) FM(MMC_WP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
662 PINMUX_IPSR_GPSR(IP5_19_16, D3),
H A Dpfc-r8a77951.c93 #define GPSR0_3 F_(D3, IP5_27_24)
302 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
943 PINMUX_IPSR_GPSR(IP5_27_24, D3),
5713 { RCAR_GP_PIN(0, 3), 8, 3 }, /* D3 */
5976 [13] = RCAR_GP_PIN(0, 3), /* D3 */
H A Dpfc-r8a77965.c98 #define GPSR0_3 F_(D3, IP5_27_24)
307 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
949 PINMUX_IPSR_GPSR(IP5_27_24, D3),
5909 { RCAR_GP_PIN(0, 3), 8, 3 }, /* D3 */
6169 [13] = RCAR_GP_PIN(0, 3), /* D3 */
H A Dpfc-r8a7796.c98 #define GPSR0_3 F_(D3, IP5_27_24)
307 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
947 PINMUX_IPSR_GPSR(IP5_27_24, D3),
5668 { RCAR_GP_PIN(0, 3), 8, 3 }, /* D3 */
5928 [13] = RCAR_GP_PIN(0, 3), /* D3 */
H A Dpfc-r8a73a4.c359 F1(D3), F2(VIO_D3), F5(GIO_OUT3_219),
H A Dpfc-sh7264.c1300 GPIO_FN(D3),
H A Dpfc-r8a7792.c360 PINMUX_SINGLE(D3),
2704 [ 3] = RCAR_GP_PIN(2, 3), /* D3 */
H A Dpfc-r8a779a0.c396 #define IP0SR2_11_8 FM(GP2_02) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
945 PINMUX_IPSR_MSEL(IP0SR2_11_8, D3, SEL_I2C0_0),
H A Dpfc-r8a77470.c599 PINMUX_IPSR_GPSR(IP1_23_20, D3),
3377 [29] = RCAR_GP_PIN(1, 3), /* D3 */
H A Dpfc-sh7269.c1738 GPIO_FN(D3),
H A Dpfc-sh7757.c1660 GPIO_FN(D3),
H A Dpfc-sh7724.c1405 GPIO_FN(D3),
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S8390 mov.l (%a0),%d3 # D3 is exponent of smallest norm. #
8405 add.l %d6,%d2 # (D3,D4,D5) is normalized
8427 or.l %d7,%d4 # (D3,D4,D5) normalized
9440 mov.l SRC_LO(%a0),%d5 # (D3,D4,D5) is |Y|
9456 sub.l %d6,%d3 # (D3,D4,D5) is normalized
9470 or.l %d7,%d4 # (D3,D4,D5) normalized
9475 add.l &0x00003FFE,%d3 # (D3,D4,D5) normalized
9530 clr.l %d3 # D3 is Q
/linux-master/drivers/pinctrl/
H A Dpinctrl-pic32.c127 PINCTRL_PIN(51, "D3"),
216 "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
238 "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
243 "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
248 "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
952 PIC32_PINCTRL_GROUP(51, D3,

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