Searched refs:CE4100_SSCR1_RFT (Results 1 - 2 of 2) sorted by relevance

/linux-master/include/linux/
H A Dpxa2xx_ssp.h104 #define CE4100_SSCR1_RFT GENMASK(11, 10) /* Receive FIFO Threshold (mask) */ macro
/linux-master/drivers/spi/
H A Dspi-pxa2xx.c64 | CE4100_SSCR1_RFT | CE4100_SSCR1_TFT | SSCR1_MWDS \
266 mask = CE4100_SSCR1_RFT;
598 mask |= CE4100_SSCR1_RFT;
1296 chip->threshold = (CE4100_SSCR1_RxTresh(rx_thres) & CE4100_SSCR1_RFT) |

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