Searched refs:C0_TLBLO0 (Results 1 - 9 of 9) sorted by path

/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480ht/src/
H A Dbcm91480ht_init.S307 mtc0 v0,C0_TLBLO0
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/
H A Dsbmips.h228 #define C0_TLBLO0 $2 /* CP0: TLB EntryLo0 */ macro
229 #define C0_TLBLO C0_TLBLO0 /* CP0: TLB EntryLo0 */
267 #define C0_TLBLO0 2 /* CP0: TLB EntryLo0 */ macro
268 #define C0_TLBLO C0_TLBLO0 /* CP0: TLB EntryLo0 */
303 #define C0_ENTRYLO0 C0_TLBLO0
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dbcm1480_cpu.S406 mtc0 k0,C0_TLBLO0 # and write to CP0
H A Dsb1_cpuinit.S253 mtc0 zero,C0_TLBLO0 /* tlblo0 = invalid */
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/include/
H A Dsbmips32.h174 #define C0_TLBLO0 $2 /* CP0: TLB EntryLo0 */ macro
175 #define C0_TLBLO C0_TLBLO0 /* CP0: TLB EntryLo0 */
204 #define C0_TLBLO0 2 /* CP0: TLB EntryLo0 */ macro
205 #define C0_TLBLO C0_TLBLO0 /* CP0: TLB EntryLo0 */
236 #define C0_ENTRYLO0 C0_TLBLO0
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_cpuinit.S188 mtc0 zero,C0_TLBLO0 /* tlblo0 = invalid */
505 mtc0 k0,C0_TLBLO0 # and write to CP0
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_cpu.S425 mtc0 k0,C0_TLBLO0 # and write to CP0
H A Dsb1_cpuinit.S252 mtc0 zero,C0_TLBLO0 /* tlblo0 = invalid */
/broadcom-cfe-1.4.2/cfe/verif/
H A Dvapi.S410 LSAVECP0(C0_TLBLO0,34)
779 SAVECP0(C0_TLBLO0,34)

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