Searched refs:BASE_INNER (Results 1 - 25 of 66) sorted by relevance

123

/linux-master/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn302.c34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn301.c34 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn21.c34 #define BASE_INNER(seg) DMU_BASE__INST0_SEG##seg macro
H A Ddmub_dcn303.c35 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn315.c40 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn316.c40 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn314.c40 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
H A Ddmub_dcn351.c11 #define BASE_INNER(seg) ctx->dcn_reg_offsets[seg] macro
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c50 #undef BASE_INNER macro
51 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
53 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn21.c49 #undef BASE_INNER macro
50 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c56 #undef BASE_INNER macro
57 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
59 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn315.c49 #undef BASE_INNER macro
50 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c52 #undef BASE_INNER macro
53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
55 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn20.c49 #undef BASE_INNER macro
50 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
52 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c59 #undef BASE_INNER macro
60 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
62 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn30.c54 #undef BASE_INNER macro
55 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
57 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c52 #undef BASE_INNER macro
53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
55 #define BASE(seg) BASE_INNER(seg)
H A Dhw_translate_dcn32.c47 #undef BASE_INNER macro
48 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
50 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c53 #define BASE_INNER(seg) \ macro
58 BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c139 #undef BASE_INNER macro
140 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
142 #define BASE(seg) BASE_INNER(seg)
146 BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c45 #ifdef BASE_INNER
46 #undef BASE_INNER macro
49 #define BASE_INNER(seg) MP1_BASE__INST0_SEG ## seg macro
51 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c50 #define BASE_INNER(seg) \ macro
55 BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.c45 #ifdef BASE_INNER
46 #undef BASE_INNER macro
49 #define BASE_INNER(seg) MP1_BASE__INST0_SEG ## seg macro
51 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn303/
H A Dirq_service_dcn303.c127 #undef BASE_INNER macro
128 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
131 #define BASE(seg) BASE_INNER(seg)
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c190 #undef BASE_INNER macro
191 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
195 BASE_INNER(seg)

Completed in 176 milliseconds

123