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499e4b1c |
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29-May-2020 |
Eric Yang <Eric.Yang2@amd.com> |
drm/amd/display: add mechanism to skip DCN init [Why] If optimized init is done in FW. DCN init can be skipped in driver. This need to be communicated between driver and fw and maintain backwards compatibility. [How] Use DMUB scratch 0 bit 2 to indicate optimized init done in fw and use DMUB scatch 4 bit 0 to indicate drive supports the optimized flow so FW will perform it. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2631ac1a |
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17-May-2021 |
Ashley Thomas <Ashley.Thomas2@amd.com> |
drm/amd/display: add DMUB registers to crash dump diagnostic data. [WHY] Ability to triage DMCUB is improved with availability of certain dmub registers not currently captured in crash dump diagnostic data. [HOW] Add dmub registers to diagnostic data collection. Thanks Nicholas Kazlauskas for awesome input on this! Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5fe6b98a |
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13-Nov-2020 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Update dmub code There is a delta in the dmub code - add boot options - add boot status - remove unused auto_load_is_done func pointer Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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64c51ea5 |
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09-Jul-2020 |
Changfeng <Changfeng.Zhu@amd.com> |
Revert "drm/amd/display: add mechanism to skip DCN init" To avoid s3 faild at the first cycle on renoir platform, it needs to revert this patch: drm/amd/display: add mechanism to skip DCN init Signed-off-by: changfeng <Changfeng.Zhu@amd.com> Ackedy-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8f95ff28 |
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29-May-2020 |
Eric Yang <Eric.Yang2@amd.com> |
drm/amd/display: add mechanism to skip DCN init [Why] If optimized init is done in FW. DCN init be skipped in driver. This need to be communicated between driver and fw and maintain backwards compatibility. [How] Use DMUB scratch 0 bit 2 to indicate optimized init done in fw and use DMUB scatch 4 bit 0 to indicate drive supports the optimized flow so FW will perform it. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cdca3f21 |
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21-Apr-2020 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: move location of dmub_srv.h file [Why] Make a separation of what belongs in the differen dmub headers dmub_srv.h is for exposing dmub srv interface to rest of driver. other headers inside dmub/inc exposes cmds and definitions that are owned by the firmware [How] keep firmware owned definitions in dmub/inc move stuff that is purely driver interface headers to dmub/ since those are interface calls that are defined for rest of driver to use Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c09d1d34 |
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20-Nov-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Use physical addressing for DMCUB on both dcn20/21 [Why] CW0 and CW1 need to use physical addressing mode for dcn20 and dcn21. The current code for dcn20 is using virtual. [How] We already program the DMCUB like this on dcn21 so we should just use the same sequence for both. Copy the dcn21 sequences into the dmjub_dcn20.c file and rename them. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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01c229d9 |
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20-Nov-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Get DMUB registers from ASIC specific structs [Why] These values can differ per ASIC and should follow the full DC style register programming model. [How] Define a common list and fill in the common list separately for dcn20 and dcn21. Unlike DC we're not using designated initializers for better compiler compatibility since this resides in the DMUB service. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2f39835c |
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12-Nov-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Add shared DMCUB/driver firmware state cache window [Why] Scratch registers are limited on the DMCUB and we have an expanding list of state to track between driver and DMCUB. [How] Place shared state in cache window 6. The cache window size is aligned to the size of the cache line on the DMCUB to make it easy to invalidate. The shared state is intended to be read only from driver side so it's been marked as const. The use of volatile is intentional. The memory for the shared firmware state is memory mapped from the framebuffer memory. The DMCUB will flush its cache after modifying the region. There's no way for x86 to known whether this data is stale or not so we want to intentionally disable optimization to force the read at every access. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3c465370 |
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07-Nov-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Only wait for DMUB phy init on dcn21 [Why] The wait for PHY init won't finish if the firmware doesn't support it. [How] Only hook this functionality up on DCN21 and move it out of DCN20. For ASIC without support then this should return OK so we don't hang while waiting in DC. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7c008829 |
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25-Oct-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Add the DMUB service The DMUB service is the interface to the DMCUB. It's required to support Renoir features so it will be enabled and compiled automatically when the Renoir display engine is enabled via CONFIG_DRM_AMD_DC_DCN2_1. DMUB code will initially be guarded by CONFIG_DRM_AMD_DC_DMUB and later switched to CONFIG_DRM_AMD_DC_DCN2_1 with the config option dropped. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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