Searched refs:AUX_DPHY_RX_CONTROL0 (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
138 uint32_t AUX_DPHY_RX_CONTROL0; member in struct:dce110_link_enc_aux_registers
H A Ddce_link_encoder.c636 addr = AUX_REG(AUX_DPHY_RX_CONTROL0);
641 AUX_DPHY_RX_CONTROL0, AUX_RX_RECEIVE_WINDOW);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c323 AUX_REG_UPDATE_5(AUX_DPHY_RX_CONTROL0,
335 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control0_val);
341 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_link_encoder.c234 AUX_REG_UPDATE_5(AUX_DPHY_RX_CONTROL0,
245 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_link_encoder.c114 AUX_REG_UPDATE_5(AUX_DPHY_RX_CONTROL0,
125 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h36 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
75 uint32_t AUX_DPHY_RX_CONTROL0; member in struct:dcn10_link_enc_aux_registers
H A Ddcn10_link_encoder.c1420 AUX_REG_UPDATE(AUX_DPHY_RX_CONTROL0,
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h305 SRI_ARR(AUX_CONTROL, DP_AUX, id), SRI_ARR(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \

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