Searched refs:AR_INTR_SYNC_ENABLE (Results 1 - 10 of 10) sorted by relevance

/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_gpio.c228 val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),
230 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
267 val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),
269 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
H A Dar5416_interrupts.c282 OS_REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);
283 (void) OS_REG_READ(ah, AR_INTR_SYNC_ENABLE);
372 OS_REG_WRITE(ah, AR_INTR_SYNC_ENABLE, mask);
H A Dar5416reg.h39 #define AR_INTR_SYNC_ENABLE 0x402c /* enable interrupts */ macro
H A Dar5416_reset.c690 OS_REG_WRITE(ah, AR_INTR_SYNC_ENABLE, AR_INTR_SYNC_DEFAULT);
1382 OS_REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);
/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_interrupts.c525 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), 0);
527 (void) OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE));
722 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE),
H A Dar9300_gpio.c443 regs[0] = AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE);
627 "AR_INTR_SYNC_ENABLE: 0x%08X\n",
628 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE)));
H A Dar9300_reset.c1680 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), 0);
1685 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), 0);
4206 AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), sync_en_def);
H A Dar9300.h741 u_int32_t AR_INTR_SYNC_ENABLE; member in struct:ath_hal_9300::__anon8060
H A Dar9300_attach.c4123 AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE) =
4230 AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE) =
/freebsd-11-stable/tools/tools/ath/common/
H A Ddumpregs_5416.c274 DEFVOID(AR_INTR_SYNC_ENABLE,"INTR_SYNC_ENABLE"),

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