Searched refs:AR_CFG_SCLK_32KHZ (Results 1 - 4 of 4) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416reg.h248 #define AR_CFG_SCLK_32KHZ 0x00000003 /* Sleep clock rate */ macro
H A Dar5416_reset.c288 AR_MAC_LED_ASSOC_ACTIVE | AR_CFG_SCLK_32KHZ);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300reg.h687 #define AR_CFG_SCLK_32KHZ 0x00000003 /* Sleep clock rate */ macro
H A Dar9300_reset.c5226 OS_REG_WRITE(ah, AR_CFG_LED, save_led_state | AR_CFG_SCLK_32KHZ);

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