Searched refs:CRC (Results 1 - 15 of 15) sorted by relevance

/linux-master/drivers/net/wireless/marvell/libertas/
H A Dif_usb.h86 __le32 CRC; member in struct:fwheader
/linux-master/drivers/net/wireless/marvell/libertas_tf/
H A Dif_usb.h76 __le32 CRC; member in struct:fwheader
/linux-master/arch/x86/crypto/
H A Dcrc32c-pcl-intel-asm_64.S49 ## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
123 #### Calculate CRC of unaligned bytes of the buffer (if any)
190 ## 3) CRC Array:
225 movq crc_init, %xmm1 # CRC for block 1
228 movq crc1, %xmm2 # CRC for block 2
291 crc32l (bufptmp), crc_init_dw # CRC of 4 bytes
298 crc32w (bufptmp), crc_init_dw # CRC of 2 bytes
305 crc32b (bufptmp), crc_init_dw # CRC of 1 byte
H A Dcrc32-pclmul_asm.S63 #define CRC %edx define
67 #define CRC %ecx define
77 * CRC - initial crc32
88 movd CRC, CONSTANT
H A Dcrct10dif-pcl-asm_64.S2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
47 # Reference paper titled "Fast CRC Computation for Generic
125 # XOR the first 16 data *bits* with the initial CRC value.
225 # Reduce the 128-bit value M(x), stored in xmm7, to the final 16-bit CRC
249 # Use Barrett reduction to compute the final CRC value.
256 # Final CRC value (x^16 * M(x)) mod G(x) is in low 16 bits of xmm0.
270 # XOR the first 16 data *bits* with the initial CRC value.
/linux-master/drivers/net/ethernet/amd/
H A Dnmclan_cs.c1287 static void updateCRC(int *CRC, int bit) argument
1294 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1295 CRC generator polynomial. */
1299 /* shift CRC and control bit (CRC[32]) */
1301 CRC[j] = CRC[j-1];
1302 CRC[0] = 0;
1304 /* If bit XOR(control bit) = 1, set CRC = CRC XO
1321 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */ local
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/linux-master/drivers/char/xilinx_hwicap/
H A Dxilinx_hwicap.h125 u32 CRC; member in struct:config_registers
184 /* Constant to use for CRC check when CRC has been disabled */
H A Dxilinx_hwicap.c118 .CRC = 0,
143 .CRC = 0,
168 .CRC = 0,
193 .CRC = 0,
/linux-master/arch/arm/crypto/
H A Dcrc32-ce-core.S2 * Accelerated CRC32(C) using ARM CRC, NEON and Crypto Extensions instructions
113 CRC .req r2
121 * CRC - initial crc32
138 vmov.32 dCONSTANTl[0], CRC
/linux-master/scripts/
H A Dget_dvb_firmware792 my $CRC="\x0A\xCC";
800 print FW "$CRC"; # 16bit crc value of main part
/linux-master/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_mbx.c514 /* pre-generated data for generating the CRC based on the poly 0xAC9A. */
550 * fm10k_crc_16b - Generate a 16 bit CRC for a region of 16 bit data
552 * @seed: seed value for CRC
555 * This function will generate a CRC based on the polynomial 0xAC9A and
580 * fm10k_fifo_crc - generate a CRC based off of FIFO data
584 * @seed: seed value for CRC
586 * This function generates a CRC for some region of the FIFO
608 * fm10k_mbx_update_local_crc - Update the local CRC for outgoing data
612 * This function will generate the CRC for all data from the end of the
614 * previous CRC a
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/linux-master/fs/xfs/
H A Dxfs_mount.h344 __XFS_HAS_FEAT(crc, CRC)
/linux-master/drivers/net/ethernet/
H A Dfealnx.c256 CRC = 0x08, /* crc error */ enumerator in enum:rx_desc_status_bits
1636 if (rx_status & CRC)
1686 /* Omit the four octet CRC from the length. */
/linux-master/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.c342 /* CRC flag in ucode header, flags field. */
1006 * @CRC: CRC value of the data block, only valid if CRC flag is
1013 u16 CRC; member in struct:drxu_code_block_hdr
1273 registers will have undefined behaviour. Flags (RMW, CRC reset, broadcast
11608 * drx_u_code_compute_crc - Compute CRC of block of microcode data.
11612 * returns The computed CRC residue.
11673 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data + count));
11676 pr_debug("%u: addr %u, size %u, flags 0x%04x, CRC
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/linux-master/drivers/net/ethernet/emulex/benet/
H A Dbe_main.c859 BE_WRB_F_SET(wrb_params->features, CRC, 1);
870 BE_WRB_F_GET(wrb_params->features, CRC));

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