/u-boot/arch/riscv/lib/ |
H A D | semihosting.S | 15 slli zero, zero, 0x1f /* Entry NOP to identify semihosting */ 17 srai zero, zero, 7 /* NOP encoding of semihosting call number */
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/u-boot/arch/mips/mach-pic32/ |
H A D | lowlevel_init.S | 21 mtc0 zero, CP0_WIRED
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/u-boot/board/imgtec/malta/ |
H A D | lowlevel_init.S | 176 sw zero, MSC01_PCI_P2SCMAPL_OFS(t0) 192 sw zero, MSC01_PCI_HEAD3_OFS(t0) 193 sw zero, MSC01_PCI_HEAD4_OFS(t0) 194 sw zero, MSC01_PCI_HEAD5_OFS(t0) 195 sw zero, MSC01_PCI_HEAD6_OFS(t0) 196 sw zero, MSC01_PCI_HEAD7_OFS(t0) 197 sw zero, MSC01_PCI_HEAD8_OFS(t0) 198 sw zero, MSC01_PCI_HEAD9_OFS(t0) 199 sw zero, MSC01_PCI_HEAD10_OFS(t0) 200 sw zero, MSC01_PCI_HEAD12_OF [all...] |
/u-boot/arch/mips/mach-mtmips/mt7621/spl/ |
H A D | launch_ll.S | 42 move t2, zero 97 mtc0 zero, CP0_COUNT 114 ins t1, zero, STATUSB_IP7, 1 126 move a1, zero 127 move a2, zero 128 move a3, zero 151 mtc0 zero, CP0_TAGLO 152 mtc0 zero, CP0_TAGLO, 2 181 2: LONG_L zero, 0(t0) 221 move a2, zero [all...] |
H A D | start.S | 28 MTC0 zero, CP0_WATCHLO,\sel 52 PTR_S zero, 0(t0) 67 mtc0 zero, CP0_COUNT 94 mtc0 zero, CP0_CAUSE 97 mtc0 zero, CP0_COMPARE 119 sw zero, DMA_ROUTE_REG(t0) 124 ins t1, zero, 30, 2 # CPU_CLK_SEL 194 1: sw zero, 0(a0) 222 move a0, zero # a0 <-- boot_flags = 0 224 move ra, zero [all...] |
/u-boot/board/synopsys/axs10x/ |
H A D | axs10x.c | 31 void board_jump_and_run(ulong entry, int zero, int arch, uint params) argument 33 void (*kernel_entry)(int zero, int arch, uint params); 39 kernel_entry(zero, arch, params);
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/u-boot/arch/arc/lib/ |
H A D | bootm.c | 42 __weak void board_jump_and_run(ulong entry, int zero, int arch, uint params) argument 44 void (*kernel_entry)(int zero, int arch, uint params); 48 kernel_entry(zero, arch, params);
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H A D | start.S | 113 /* Make sure we don't lose GD overwritten by zero new GD */
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/u-boot/arch/mips/mach-mtmips/mt7621/tpl/ |
H A D | start.S | 22 MTC0 zero, CP0_WATCHLO,\sel 36 mtc0 zero, CP0_COUNT 77 ins t0, zero, 0, 3 109 mtc0 zero, CP0_CAUSE 112 mtc0 zero, CP0_COMPARE 127 ins t1, zero, 0, 2 # CM_DEFAULT_TARGET 143 ins t1, zero, 30, 2 # CPU_CLK_SEL
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/u-boot/arch/mips/cpu/ |
H A D | start.S | 26 MTC0 zero, CP0_WATCHLO,\sel 61 PTR_S zero, 0(t0) 127 mtc0 zero, CP0_COUNT # clear cp0 count for most accurate boot timing 190 MTC0 zero, CP0_WATCHLO 191 mtc0 zero, CP0_WATCHHI 195 mtc0 zero, CP0_CAUSE 198 mtc0 zero, CP0_COMPARE 274 move a0, zero # a0 <-- boot_flags = 0 278 move ra, zero
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H A D | cm_init.S | 37 sw zero, GCR_BASE_UPPER(t0)
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/u-boot/arch/mips/lib/ |
H A D | cache_init.S | 53 move \sz, zero 106 * memory starting at location zero to be used as a source of parity. 131 move R_L2_SIZE, zero 132 move R_L2_LINE, zero 133 move R_L2_BYPASSED, zero 134 move R_L2_L2C, zero 187 sw zero, GCR_L2_TAG_ADDR(t0) 188 sw zero, GCR_L2_TAG_ADDR_UPPER(t0) 189 sw zero, GCR_L2_TAG_STATE(t0) 190 sw zero, GCR_L2_TAG_STATE_UPPE [all...] |
/u-boot/arch/riscv/cpu/ |
H A D | start.S | 58 mv gp, zero 72 csrw MODE_PREFIX(ie), zero 120 SREG zero, 0(t1) /* t1 is always 16 byte aligned */ 180 amoswap.w.rl zero, zero, 0(t0) 203 amoswap.w.rl zero, zero, 0(t0) 217 mv a0, zero /* a0 <-- boot_flags = 0 */ 228 SREG zero, 0(t0) 254 mv a3, zero [all...] |
/u-boot/arch/mips/include/asm/ |
H A D | regdef.h | 19 #define zero $0 /* wired zero */ macro 62 #define zero $0 /* wired zero */ macro
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/u-boot/arch/mips/mach-mscc/ |
H A D | lowlevel_init_luton.S | 26 bne v1, zero, 1f 45 /* Keep looping if zero (no lock bit yet) */ 46 beq v1, zero, 2b
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/u-boot/arch/mips/mach-octeon/ |
H A D | lowlevel_init.S | 25 dins a0, zero, 0, 9 66 ins t2, zero, 0, 7 /* Round up to cache line for memcpy */ 111 * zero'ing all of CVMSEG 114 dins a0, zero, 0, 9
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/u-boot/arch/mips/mach-jz47xx/ |
H A D | start.S | 63 mtc0 zero, CP0_TAGLO 64 mtc0 zero, CP0_TAGHI
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/u-boot/arch/mips/mach-mtmips/mt7620/ |
H A D | lowlevel_init.S | 38 PTR_S zero, 0(t0)
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/u-boot/arch/mips/mach-mtmips/mt7628/ |
H A D | lowlevel_init.S | 64 ins t0, zero, 30, 2 72 mtc0 zero, CP0_TAGLO /* Zero to DDataLo */ 83 mtc0 zero, CP0_TAGLO, 2
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/u-boot/arch/arm/mach-keystone/ |
H A D | config.mk | 33 @dd if=/dev/zero bs=8 count=1 2>/dev/null >> $@
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/u-boot/board/BuR/brsmarc1/ |
H A D | config.mk | 13 dd if=/dev/zero ibs=1M count=2 2>/dev/null | tr "\000" "\377" >$@ && \
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/u-boot/board/BuR/brppt2/ |
H A D | config.mk | 13 dd if=/dev/zero ibs=1M count=2 2>/dev/null | tr "\000" "\377" >$@ && \
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/u-boot/board/BuR/brppt1/ |
H A D | config.mk | 14 dd if=/dev/zero ibs=1M count=2 2>/dev/null | tr "\000" "\377" >$@ && \
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/u-boot/cmd/ |
H A D | tpm_test.c | 186 uint32_t zero = 0; local 196 TPM_CHECK(tpm_nv_write_value(dev, INDEX0, (uint8_t *)&zero, 199 TPM_CHECK(tpm_nv_write_value(dev, INDEX1, (uint8_t *)&zero, 240 uint32_t zero = 0; local 246 tpm_nv_write_value(dev, INDEX0, (uint8_t *)&zero, 4); 248 tpm_nv_write_value(dev, INDEX1, (uint8_t *)&zero, 4); 250 tpm_nv_write_value(dev, INDEX2, (uint8_t *)&zero, 4); 252 tpm_nv_write_value(dev, INDEX3, (uint8_t *)&zero, 4);
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/u-boot/tools/ |
H A D | socfpgaimage.c | 22 * 0x45 1 Flags (unused, zero is fine) 32 * 0x45 1 Flags (unused, zero is fine) 77 uint16_t zero; member in struct:socfpga_header_v0 88 uint16_t zero; member in struct:socfpga_header_v1 142 .zero = 0, 153 .zero = 0,
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