Searched refs:tldr (Results 1 - 7 of 7) sorted by relevance

/u-boot/drivers/timer/
H A Domap-timer.c35 unsigned int tldr; /* offset 0x40 */
67 writel(0, &priv->regs->tldr);
36 unsigned int tldr; /* offset 0x40 */ member in struct:omap_gptimer_regs
/u-boot/arch/arm/mach-omap2/
H A Dtimer.c44 writel(TIMER_LOAD_VAL, &timer_base->tldr);
/u-boot/arch/arm/include/asm/arch-omap4/
H A Dcpu.h28 u32 tldr; /* 0x2c rw */ member in struct:gptimer
/u-boot/arch/arm/include/asm/arch-omap5/
H A Dcpu.h34 u32 tldr; /* 0x40 rw */ member in struct:gptimer
/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dcpu.h435 unsigned int tldr; /* offset 0x40 */ member in struct:gptimer
/u-boot/arch/arm/include/asm/arch-omap3/
H A Dcpu.h276 u32 tldr; /* 0x2c rw */ member in struct:gptimer
/u-boot/arch/arm/mach-omap2/omap3/
H A Dclock.c55 writel(0, &gpt1_base->tldr); /* start counting at 0 */

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