Searched refs:sys_reg (Results 1 - 12 of 12) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dpmu_rk3188.h28 u32 sys_reg[4]; member in struct:rk3188_pmu
H A Dpmu_rk3288.h49 u32 sys_reg[4]; member in struct:rk3288_pmu
51 check_member(rk3288_pmu, sys_reg[3], 0x00a0);
H A Dgrf_rk3128.h92 unsigned int sys_reg[4]; member in struct:rk3128_pmu
/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3188.c540 u32 sys_reg = 0; local
542 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
543 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
548 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
549 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
550 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
551 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
552 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
553 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
554 sys_reg |
[all...]
H A Dsdram_rk3066.c525 u32 sys_reg = 0; local
527 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
528 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
533 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
534 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
535 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
536 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
537 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
538 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
539 sys_reg |
[all...]
H A Ddmc-rk3368.c780 u32 sys_reg = 0; local
783 sys_reg |= DDR3 << SYS_REG_DDRTYPE_SHIFT;
784 sys_reg |= 0 << SYS_REG_NUM_CH_SHIFT;
786 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
787 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
788 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
789 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
790 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
791 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
792 sys_reg |
[all...]
H A Dsdram_rk322x.c582 u32 sys_reg = 0; local
584 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
585 sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT;
586 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0);
587 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0);
588 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0);
589 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0);
590 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0);
591 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0);
592 sys_reg |
[all...]
H A Dsdram_rk3288.c598 u32 sys_reg = 0; local
600 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
601 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
606 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
607 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
608 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
609 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
610 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
611 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
612 sys_reg |
[all...]
H A Dsdram_px30.c651 u32 sys_reg = 0; local
671 sys_reg = readl(&dram->pmugrf->os_reg[2]);
674 sys_reg, sys_reg3, 0);
675 writel(sys_reg, &dram->pmugrf->os_reg[2]);
H A Dsdram_rk3328.c474 u32 sys_reg = 0; local
501 sys_reg = readl(&dram->grf->os_reg[2]);
504 sys_reg, sys_reg3, 0);
505 writel(sys_reg, &dram->grf->os_reg[2]);
H A Dsdram_rv1126.c2692 u32 sys_reg = 0; local
2732 sys_reg = readl(&dram->pmugrf->os_reg[2]);
2735 sys_reg, sys_reg3, 0);
2736 writel(sys_reg, &dram->pmugrf->os_reg[2]);
/u-boot/arch/arm/include/asm/
H A Desr.h238 sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \
250 sys_reg(3, \

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