Searched refs:ref_clock (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dhigh_speed_env_spec.h90 enum ref_clock { enum
228 enum ref_clock ref_clock);
233 enum ref_clock ref_clock);
236 enum ref_clock *ref_clock);
238 enum ref_clock ref_clock);
H A Dhigh_speed_env_spec-38x.c51 enum ref_clock ref_clock)
47 serdes_power_up_ctrl_ext(u32 serdes_num, int serdes_power_up, enum serdes_type serdes_type, enum serdes_speed baud_rate, enum serdes_mode serdes_mode, enum ref_clock ref_clock) argument
H A Dhigh_speed_env_spec.c1488 enum ref_clock ref_clock; local
1529 ref_clock = hws_serdes_get_ref_clock_val(serdes_type);
1530 if (ref_clock == REF_CLOCK_UNSUPPORTED) {
1539 serdes_mode, ref_clock));
1655 enum ref_clock ref_clock; local
1663 ref_clock = hws_serdes_silicon_ref_clock_get();
1667 return ref_clock;
1678 return ref_clock;
1687 serdes_power_up_ctrl(u32 serdes_num, int serdes_power_up, enum serdes_type serdes_type, enum serdes_speed baud_rate, enum serdes_mode serdes_mode, enum ref_clock ref_clock) argument
1995 hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type, enum ref_clock ref_clock) argument
[all...]
/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c250 u32 ref_clock; local
270 ref_clock = V_OSCK / (predivider_n + 1);
271 pll_bandwidth = ref_clock / 70;
272 mod_freq_divider = ref_clock / (4 * pll_bandwidth);
/u-boot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-core.h446 struct ref_clock { struct
481 static inline struct ref_clock *to_ref_clk(struct clk *clock)
483 return container_of(clock, struct ref_clock, clk);
/u-boot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-core.h446 struct ref_clock { struct
481 static inline struct ref_clock *to_ref_clk(struct clk *clock)
483 return container_of(clock, struct ref_clock, clk);
/u-boot/arch/mips/mach-octeon/
H A Dcpu.c61 const u64 ref_clock = PLL_REF_CLK; local
67 gd->cpu_clk = ref_clock * FIELD_GET(RST_BOOT_C_MUL, val);
68 gd->bus_clk = ref_clock * FIELD_GET(RST_BOOT_PNR_MUL, val);
H A Dcvmx-qlm.c1902 int ref_clock[16] = { 0 }; local
1904 if (ref_clock[qlm])
1905 return ref_clock[qlm];
1963 ref_clock[qlm] = count * gd->cpu_clk / (stop_cycle - start_cycle);
1965 return ref_clock[qlm];
H A Docteon_qlm.c62 int ref_clock = cvmx_qlm_measure_clock(qlm); local
63 int mhz = ref_clock / 1000000;
/u-boot/drivers/clk/imx/
H A Dclk-pllv3.c44 unsigned long ref_clock; member in struct:clk_pllv3
276 return pll->ref_clock;
332 pll->ref_clock = 500000000;

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