/u-boot/drivers/video/sunxi/ |
H A D | simplefb_common.c | 14 int offset, ret; local 17 offset = fdt_node_offset_by_compatible(blob, -1, 19 fdt_for_each_node_by_compatible(offset, blob, -1, 21 ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline", 27 return offset;
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/u-boot/drivers/video/meson/ |
H A D | simplefb_common.c | 14 int offset, ret; local 17 fdt_for_each_node_by_compatible(offset, blob, -1, 19 ret = fdt_stringlist_search(blob, offset, "amlogic,pipeline", 25 return offset;
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/u-boot/drivers/usb/musb-new/ |
H A D | musb_io.h | 21 static inline u16 musb_readw(const void __iomem *addr, unsigned offset) argument 22 { return __raw_readw(addr + offset); } 24 static inline u32 musb_readl(const void __iomem *addr, unsigned offset) argument 25 { return __raw_readl(addr + offset); } 28 static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) argument 29 { __raw_writew(data, addr + offset); } 31 static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) argument 32 { __raw_writel(data, addr + offset); } 40 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) argument 45 tmp = __raw_readw(addr + (offset 54 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument 69 musb_readb(const void __iomem *addr, unsigned offset) argument 72 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument [all...] |
/u-boot/arch/mips/mach-mscc/include/ |
H A D | ioremap.h | 22 static inline int is_vcoreiii_internal_registers(phys_addr_t offset) argument 24 if ((offset >= MSCC_IO_ORIGIN1_OFFSET && 25 offset < (MSCC_IO_ORIGIN1_OFFSET + MSCC_IO_ORIGIN1_SIZE)) || 26 (offset >= MSCC_IO_ORIGIN2_OFFSET && 27 offset < (MSCC_IO_ORIGIN2_OFFSET + MSCC_IO_ORIGIN2_SIZE))) 33 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, argument 36 if (is_vcoreiii_internal_registers(offset)) 37 return (void __iomem *)offset;
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/u-boot/drivers/misc/ |
H A D | sl28cpld.c | 11 uint offset; member in struct:sl28cpld_child_plat 18 static int sl28cpld_read_child(struct udevice *dev, uint offset) argument 23 return dm_i2c_reg_read(mfd, offset + plat->offset); 26 int sl28cpld_read(struct udevice *dev, uint offset) argument 29 return dm_i2c_reg_read(dev, offset); 31 return sl28cpld_read_child(dev, offset); 34 static int sl28cpld_write_child(struct udevice *dev, uint offset, argument 40 return dm_i2c_reg_write(mfd, offset + plat->offset, valu 43 sl28cpld_write(struct udevice *dev, uint offset, uint8_t value) argument 51 sl28cpld_update(struct udevice *dev, uint offset, uint8_t clear, uint8_t set) argument 77 int offset; local [all...] |
/u-boot/arch/mips/mach-bmips/include/ |
H A D | ioremap.h | 17 static inline int is_bmips_internal_registers(phys_addr_t offset) argument 22 if (offset >= 0xfffe0000) 29 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, argument 32 if (is_bmips_internal_registers(offset)) 33 return (void __iomem *)offset;
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/u-boot/arch/sandbox/include/asm/ |
H A D | gpio.h | 39 * @param offset GPIO offset within bank 42 int sandbox_gpio_get_value(struct udevice *dev, unsigned int offset); 48 * @param offset GPIO offset within bank 52 int sandbox_gpio_set_value(struct udevice *dev, unsigned int offset, int value); 58 * @param offset GPIO offset within bank 61 int sandbox_gpio_get_direction(struct udevice *dev, unsigned int offset); 67 * @param offset GPI [all...] |
/u-boot/arch/arm/cpu/armv8/ |
H A D | spin_table.c | 13 int cpus_offset, offset; local 24 for (offset = fdt_first_subnode(fdt, cpus_offset); 25 offset >= 0; 26 offset = fdt_next_subnode(fdt, offset)) { 27 prop = fdt_getprop(fdt, offset, "device_type", NULL); 36 prop = fdt_getprop(fdt, offset, "enable-method", NULL); 41 for (offset = fdt_first_subnode(fdt, cpus_offset); 42 offset >= 0; 43 offset [all...] |
/u-boot/board/freescale/lx2160a/ |
H A D | eth_lx2160ardb.c | 44 int offset, dpmacs_offset; local 46 /* get the dpmac offset */ 57 offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str); 58 if (offset < 0) { 60 offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str); 61 if (offset < 0) { 64 return offset; 68 return offset; 75 int offset; local 78 /* get the dpmac offset */ 112 int offset; local [all...] |
/u-boot/arch/x86/cpu/apollolake/ |
H A D | fsp_bindings.c | 219 &cfg[fspb->offset]); 223 (u16 *)&cfg[fspb->offset]); 229 (u32 *)&cfg[fspb->offset]); 233 (u64 *)&cfg[fspb->offset]); 239 (char *)&cfg[fspb->offset]); 243 &cfg[fspb->offset]); 255 .offset = offsetof(struct fsp_m_config, serial_debug_port_address), 259 .offset = offsetof(struct fsp_m_config, serial_debug_port_type), 263 .offset = offsetof(struct fsp_m_config, serial_debug_port_device), 267 .offset [all...] |
/u-boot/board/toradex/common/ |
H A D | tdx-eeprom.h | 11 int read_tdx_eeprom_data(u32 eeprom_id, int offset, uint8_t *buf, int size); 12 int write_tdx_eeprom_data(u32 eeprom_id, int offset, uint8_t *buf, int size);
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/u-boot/include/ |
H A D | p2sb.h | 10 /* Port Id lives in bits 23:16 and register offset lives in 15:0 of address */ 76 * @offset: Offset within device to read 79 uint pcr_read32(struct udevice *dev, uint offset); 80 uint pcr_read16(struct udevice *dev, uint offset); 81 uint pcr_read8(struct udevice *dev, uint offset); 89 * @offset: Offset within device to write 92 void pcr_write32(struct udevice *dev, uint offset, uint data); 93 void pcr_write16(struct udevice *dev, uint offset, uint data); 94 void pcr_write8(struct udevice *dev, uint offset, uint data); 106 * @offset 114 pcr_setbits32(struct udevice *dev, uint offset, uint set) argument 119 pcr_setbits16(struct udevice *dev, uint offset, uint set) argument 124 pcr_setbits8(struct udevice *dev, uint offset, uint set) argument 129 pcr_clrbits32(struct udevice *dev, uint offset, uint clr) argument 134 pcr_clrbits16(struct udevice *dev, uint offset, uint clr) argument 139 pcr_clrbits8(struct udevice *dev, uint offset, uint clr) argument [all...] |
H A D | eeprom.h | 12 int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt); 13 int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); 20 #define eeprom_read(dev_addr, offset, buffer, cnt) (-ENOSYS) 21 #define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS)
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H A D | sl28cpld.h | 11 int sl28cpld_read(struct udevice *dev, uint offset); 12 int sl28cpld_write(struct udevice *dev, uint offset, uint8_t value); 13 int sl28cpld_update(struct udevice *dev, uint offset, uint8_t clear,
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/u-boot/arch/x86/include/asm/ |
H A D | gpio.h | 14 int offset; member in struct:ich6_bank_plat
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/u-boot/tools/binman/test/ |
H A D | u_boot_binman_syms_bad.c | 13 binman_sym_declare(unsigned long, u_boot_spl_any, offset); 14 binman_sym_declare(unsigned long long, u_boot_spl2, offset);
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H A D | u_boot_binman_syms_x86.c | 13 binman_sym_declare(unsigned long, u_boot_spl_any, offset); 14 binman_sym_declare(unsigned long long, u_boot_spl2, offset);
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H A D | u_boot_binman_syms.c | 13 binman_sym_declare(unsigned long, u_boot_spl_any, offset); 14 binman_sym_declare(unsigned long long, u_boot_spl2, offset);
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/u-boot/dts/upstream/include/dt-bindings/gpio/ |
H A D | tegra241-gpio.h | 32 #define TEGRA241_MAIN_GPIO(port, offset) \ 33 ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset)) 39 #define TEGRA241_AON_GPIO(port, offset) \ 40 ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
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/u-boot/arch/mips/mach-octeon/include/mach/ |
H A D | cvmx-pexp-defs.h | 12 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (0x00011F0000008000ull + ((offset) & 31) * 16) 24 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (0x00011F0000008450ull + ((offset) & 7) * 16) 25 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (0x00011F00000083B0ull + ((offset) & 7) * 16) 26 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (0x00011F0000008400ull + ((offset) & 7) * 16) 27 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (0x00011F00000084A0ull + ((offset) 171 CVMX_PEXP_SLI_CTL_PORTX(unsigned long offset) argument 244 CVMX_PEXP_SLI_DMAX_CNT(unsigned long offset) argument 266 CVMX_PEXP_SLI_DMAX_INT_LEVEL(unsigned long offset) argument 288 CVMX_PEXP_SLI_DMAX_TIM(unsigned long offset) argument 404 CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX(unsigned long offset) argument 458 CVMX_PEXP_SLI_MSIXX_TABLE_ADDR(unsigned long offset) argument 473 CVMX_PEXP_SLI_MSIXX_TABLE_DATA(unsigned long offset) argument 764 CVMX_PEXP_SLI_PKTX_CNTS(unsigned long offset) argument 788 CVMX_PEXP_SLI_PKTX_INPUT_CONTROL(unsigned long offset) argument 803 CVMX_PEXP_SLI_PKTX_INSTR_BADDR(unsigned long offset) argument 826 CVMX_PEXP_SLI_PKTX_INSTR_BAOFF_DBELL(unsigned long offset) argument 849 CVMX_PEXP_SLI_PKTX_INSTR_FIFO_RSIZE(unsigned long offset) argument 873 CVMX_PEXP_SLI_PKTX_INT_LEVELS(unsigned long offset) argument 890 CVMX_PEXP_SLI_PKTX_OUTPUT_CONTROL(unsigned long offset) argument 905 CVMX_PEXP_SLI_PKTX_OUT_SIZE(unsigned long offset) argument 930 CVMX_PEXP_SLI_PKTX_SLIST_BADDR(unsigned long offset) argument 953 CVMX_PEXP_SLI_PKTX_SLIST_BAOFF_DBELL(unsigned long offset) argument 976 CVMX_PEXP_SLI_PKTX_SLIST_FIFO_RSIZE(unsigned long offset) argument 1054 CVMX_PEXP_SLI_PKT_IN_DONEX_CNTS(unsigned long offset) argument 1219 CVMX_PEXP_SLI_S2M_PORTX_CTL(unsigned long offset) argument [all...] |
/u-boot/board/starfive/visionfive2/ |
H A D | spl.c | 94 int offset; local 102 offset = fdt_path_offset(fdt, "/soc/clock-controller@17000000"); 103 phandle = fdt_get_phandle(fdt, offset); 104 offset = fdt_path_offset(fdt, "/soc/ethernet@16030000"); 106 fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle); 107 fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_AONCLK_GMAC0_TX); 108 fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle); 109 fdt_appendprop_u32(fdt, offset, "assigned-clock-parents", 117 offset = fdt_path_offset(fdt, milk_v_mars[i].path); 120 ret = fdt_setprop_u32(fdt, offset, milk_v_mar 140 int offset; local 161 int offset; local 208 int offset; local [all...] |
/u-boot/scripts/dtc/libfdt/ |
H A D | fdt.c | 132 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) argument 134 unsigned int uoffset = offset; 135 unsigned int absoffset = offset + fdt_off_dt_struct(fdt); 137 if (offset < 0) 148 || ((offset + len) > fdt_size_dt_struct(fdt))) 151 return fdt_offset_ptr_(fdt, offset); 158 int offset = startoffset; local 162 tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); 166 offset += FDT_TAGSIZE; 173 p = fdt_offset_ptr(fdt, offset 209 fdt_check_node_offset_(const void *fdt, int offset) argument 218 fdt_check_prop_offset_(const void *fdt, int offset) argument 227 fdt_next_node(const void *fdt, int offset, int *depth) argument 267 fdt_first_subnode(const void *fdt, int offset) argument 278 fdt_next_subnode(const void *fdt, int offset) argument [all...] |
H A D | fdt_ro.c | 13 static int fdt_nodename_eq_(const void *fdt, int offset, argument 17 const char *p = fdt_get_name(fdt, offset, &olen); 117 int offset = -1; local 122 offset = fdt_next_node(fdt, offset, NULL); 123 if (offset < 0) { 124 if (offset == -FDT_ERR_NOTFOUND) 127 return offset; 130 value = fdt_get_phandle(fdt, offset); 162 unsigned int offset local 201 nextprop_(const void *fdt, int offset) argument 225 fdt_subnode_offset_namelen(const void *fdt, int offset, const char *name, int namelen) argument 254 int offset = 0; local 341 int offset; local 349 fdt_next_property_offset(const void *fdt, int offset) argument 357 fdt_get_property_by_offset_(const void *fdt, int offset, int *lenp) argument 378 fdt_get_property_by_offset(const void *fdt, int offset, int *lenp) argument 394 fdt_get_property_namelen_(const void *fdt, int offset, const char *name, int namelen, int *lenp, int *poffset) argument 425 fdt_get_property_namelen(const void *fdt, int offset, const char *name, int namelen, int *lenp) argument 469 fdt_getprop_by_offset(const void *fdt, int offset, const char **namep, int *lenp) argument 545 int offset, depth, namelen; local 597 int offset, depth; local 657 int offset; local 682 int offset; local 838 int offset, err; local 865 int offset, nextoffset = 0; local [all...] |
/u-boot/arch/arm/mach-sunxi/ |
H A D | dram_helpers.c | 29 * Test if memory at offset matches memory at a certain base 34 bool mctl_mem_matches_base(u32 offset, ulong base) argument 42 val_offset = readl(base + offset); 46 writel(0xaa55aa55, base + offset); 49 ret = readl(base) == readl(base + offset); 53 writel(val_offset, base + offset); 58 * Test if memory at offset matches memory at begin of DRAM 60 bool mctl_mem_matches(u32 offset) argument 62 return mctl_mem_matches_base(offset, CFG_SYS_SDRAM_BASE);
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/u-boot/tools/binman/etype/ |
H A D | image_header.py | 7 This creates an 8-byte entry with a magic number and the offset of the FDT map 34 offset = struct.unpack('<I', hdr[4:])[0] 36 pos = size + offset - (1 << 32) 38 pos = offset 47 optional. If omitted then the entry must have an offset property. 50 location of the FDT map. The format is a magic number followed by an offset 56 sort-by-offset for the image, unless you actually put the image header 70 offset = 0xffffffff 74 offset = (image_pos - base) & 0xffffffff 75 data = IMAGE_HEADER_MAGIC + struct.pack('<I', offset) [all...] |