1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com 4 */ 5 6#include <common.h> 7#include <dm.h> 8#include <log.h> 9#include <asm/arch/fsp_bindings.h> 10 11/** 12 * read_u8_prop() - Read an u8 property from devicetree (scalar or array) 13 * @node: Valid node reference to read property from 14 * @name: Name of the property to read from 15 * @count: If the property is expected to be an array, this is the 16 * number of expected elements 17 * Set to 0 if the property is expected to be a scalar 18 * @dst: Pointer to destination of where to save the value(s) read 19 * from devicetree 20 */ 21static void read_u8_prop(ofnode node, char *name, size_t count, u8 *dst) 22{ 23 u32 tmp; 24 const u8 *buf; 25 int ret; 26 27 if (count == 0) { 28 ret = ofnode_read_u32(node, name, &tmp); 29 if (ret == 0) 30 *dst = tmp; 31 } else { 32 buf = ofnode_read_u8_array_ptr(node, name, count); 33 if (buf) 34 memcpy(dst, buf, count); 35 } 36} 37 38/** 39 * read_u16_prop() - Read an u16 property from devicetree (scalar or array) 40 * @node: Valid node reference to read property from 41 * @name: Name of the property to read from 42 * @count: If the property is expected to be an array, this is the 43 * number of expected elements 44 * Set to 0 if the property is expected to be a scalar 45 * @dst: Pointer to destination of where to save the value(s) read 46 * from devicetree 47 * Return: 0 on success, -ve on error 48 */ 49static int read_u16_prop(ofnode node, char *name, size_t count, u16 *dst) 50{ 51 u32 tmp; 52 u32 buf[32]; 53 int ret; 54 55 if (ARRAY_SIZE(buf) < count) { 56 debug("ERROR: %s buffer to small!\n", __func__); 57 return -ENOSPC; 58 } 59 60 if (count == 0) { 61 ret = ofnode_read_u32(node, name, &tmp); 62 if (ret == 0) 63 *dst = tmp; 64 } else { 65 ret = ofnode_read_u32_array(node, name, buf, count); 66 if (ret == 0) 67 for (int i = 0; i < count; i++) 68 dst[i] = buf[i]; 69 } 70 71 return 0; 72} 73 74/** 75 * read_u32_prop() - Read an u32 property from devicetree (scalar or array) 76 * @node: Valid node reference to read property from 77 * @name: Name of the property to read from 78 * @count: If the property is expected to be an array, this is the 79 * number of expected elements 80 * set to 0 if the property is expected to be a scalar 81 * @dst: Pointer to destination of where to save the value(s) read 82 * from devicetree 83 */ 84static void read_u32_prop(ofnode node, char *name, size_t count, u32 *dst) 85{ 86 if (count == 0) 87 ofnode_read_u32(node, name, dst); 88 else 89 ofnode_read_u32_array(node, name, dst, count); 90} 91 92/** 93 * read_u64_prop() - Read an u64 property from devicetree (scalar or array) 94 * @node: Valid node reference to read property from 95 * @name: Name of the property to read from 96 * @count: If the property is expected to be an array, this is the 97 * number of expected elements 98 * set to 0 if the property is expected to be a scalar 99 * @dst: Pointer to destination of where to save the value(s) read 100 * from devicetree 101 */ 102static int read_u64_prop(ofnode node, char *name, size_t count, u64 *dst) 103{ 104 if (count == 0) { 105 ofnode_read_u64(node, name, dst); 106 } else { 107 debug("ERROR: %s u64 arrays not supported!\n", __func__); 108 return -EINVAL; 109 } 110 111 return 0; 112} 113 114/** 115 * read_string_prop() - Read a string property from devicetree 116 * @node: Valid node reference to read property from 117 * @name: Name of the property to read from 118 * @count: Size of the destination buffer 119 * @dst: Pointer to destination of where to save the values read 120 * from devicetree 121 */ 122static void read_string_prop(ofnode node, char *name, size_t count, char *dst) 123{ 124 const char *string_buf; 125 126 if (count > 0) { 127 string_buf = ofnode_read_string(node, name); 128 if (string_buf) 129 strlcpy(dst, string_buf, count); 130 } 131} 132 133/** 134 * read_swizzle_prop() - Read a swizzle property from devicetree 135 * @node: Valid node reference to read property from 136 * @name: Name of the property to read from 137 * @count: Number of elements in the swizzle configuration 138 * @dst: pointer to destination of where to save the values read 139 * from devicetree 140 */ 141static void read_swizzle_prop(ofnode node, char *name, size_t count, u8 *dst) 142{ 143 const struct lpddr4_chan_swizzle_cfg *sch; 144 /* Number of bytes to copy per DQS */ 145 const size_t sz = DQ_BITS_PER_DQS; 146 const struct lpddr4_swizzle_cfg *swizzle_cfg; 147 148 swizzle_cfg = (const struct lpddr4_swizzle_cfg *) 149 ofnode_read_u8_array_ptr(node, name, count); 150 151 if (!swizzle_cfg) 152 return; 153 /* 154 * CH0_DQB byte lanes in the bit swizzle configuration field are 155 * not 1:1. The mapping within the swizzling field is: 156 * indices [0:7] - byte lane 1 (DQS1) DQ[8:15] 157 * indices [8:15] - byte lane 0 (DQS0) DQ[0:7] 158 * indices [16:23] - byte lane 3 (DQS3) DQ[24:31] 159 * indices [24:31] - byte lane 2 (DQS2) DQ[16:23] 160 */ 161 sch = &swizzle_cfg->phys[LP4_PHYS_CH0B]; 162 memcpy(&dst[0 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz); 163 memcpy(&dst[1 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz); 164 memcpy(&dst[2 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz); 165 memcpy(&dst[3 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz); 166 167 /* 168 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1. 169 */ 170 sch = &swizzle_cfg->phys[LP4_PHYS_CH0A]; 171 memcpy(&dst[4 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz); 172 memcpy(&dst[5 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz); 173 memcpy(&dst[6 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz); 174 memcpy(&dst[7 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz); 175 176 sch = &swizzle_cfg->phys[LP4_PHYS_CH1B]; 177 memcpy(&dst[8 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz); 178 memcpy(&dst[9 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz); 179 memcpy(&dst[10 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz); 180 memcpy(&dst[11 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz); 181 182 /* 183 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1. 184 */ 185 sch = &swizzle_cfg->phys[LP4_PHYS_CH1A]; 186 memcpy(&dst[12 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz); 187 memcpy(&dst[13 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz); 188 memcpy(&dst[14 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz); 189 memcpy(&dst[15 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz); 190} 191 192/** 193 * fsp_update_config_from_dtb() - Read FSP config from devicetree node 194 * @node: Valid node reference to read property from 195 * @cfg: Pointer to FSP config structure 196 * @fsp_bindings: Binding describing which devicetree properties should 197 * be stored where in the FSP configuration structure 198 * The end of the list is declared by a NULL pointer in propname 199 * Return: 0 on success, -ve on error 200 * 201 * This function reads the configuration for FSP from the provided 202 * devicetree node and saves it in the FSP configuration structure. 203 * Configuration options that are not present in the devicetree are 204 * left at their current value. 205 */ 206__maybe_unused 207static int fsp_update_config_from_dtb(ofnode node, u8 *cfg, 208 const struct fsp_binding *fsp_bindings) 209{ 210 const struct fsp_binding *fspb; 211 int ret; 212 213 for (int i = 0; fsp_bindings[i].propname; i++) { 214 fspb = &fsp_bindings[i]; 215 216 switch (fspb->type) { 217 case FSP_UINT8: 218 read_u8_prop(node, fspb->propname, fspb->count, 219 &cfg[fspb->offset]); 220 break; 221 case FSP_UINT16: 222 ret = read_u16_prop(node, fspb->propname, fspb->count, 223 (u16 *)&cfg[fspb->offset]); 224 if (ret) 225 return ret; 226 break; 227 case FSP_UINT32: 228 read_u32_prop(node, fspb->propname, fspb->count, 229 (u32 *)&cfg[fspb->offset]); 230 break; 231 case FSP_UINT64: 232 ret = read_u64_prop(node, fspb->propname, fspb->count, 233 (u64 *)&cfg[fspb->offset]); 234 if (ret) 235 return ret; 236 break; 237 case FSP_STRING: 238 read_string_prop(node, fspb->propname, fspb->count, 239 (char *)&cfg[fspb->offset]); 240 break; 241 case FSP_LPDDR4_SWIZZLE: 242 read_swizzle_prop(node, fspb->propname, fspb->count, 243 &cfg[fspb->offset]); 244 break; 245 } 246 } 247 248 return 0; 249} 250 251#if defined(CONFIG_SPL_BUILD) 252const struct fsp_binding fsp_m_bindings[] = { 253 { 254 .type = FSP_UINT32, 255 .offset = offsetof(struct fsp_m_config, serial_debug_port_address), 256 .propname = "fspm,serial-debug-port-address", 257 }, { 258 .type = FSP_UINT8, 259 .offset = offsetof(struct fsp_m_config, serial_debug_port_type), 260 .propname = "fspm,serial-debug-port-type", 261 }, { 262 .type = FSP_UINT8, 263 .offset = offsetof(struct fsp_m_config, serial_debug_port_device), 264 .propname = "fspm,serial-debug-port-device", 265 }, { 266 .type = FSP_UINT8, 267 .offset = offsetof(struct fsp_m_config, serial_debug_port_stride_size), 268 .propname = "fspm,serial-debug-port-stride-size", 269 }, { 270 .type = FSP_UINT8, 271 .offset = offsetof(struct fsp_m_config, mrc_fast_boot), 272 .propname = "fspm,mrc-fast-boot", 273 }, { 274 .type = FSP_UINT8, 275 .offset = offsetof(struct fsp_m_config, igd), 276 .propname = "fspm,igd", 277 }, { 278 .type = FSP_UINT8, 279 .offset = offsetof(struct fsp_m_config, igd_dvmt50_pre_alloc), 280 .propname = "fspm,igd-dvmt50-pre-alloc", 281 }, { 282 .type = FSP_UINT8, 283 .offset = offsetof(struct fsp_m_config, igd_aperture_size), 284 .propname = "fspm,igd-aperture-size", 285 }, { 286 .type = FSP_UINT8, 287 .offset = offsetof(struct fsp_m_config, gtt_size), 288 .propname = "fspm,gtt-size", 289 }, { 290 .type = FSP_UINT8, 291 .offset = offsetof(struct fsp_m_config, primary_video_adaptor), 292 .propname = "fspm,primary-video-adaptor", 293 }, { 294 .type = FSP_UINT8, 295 .offset = offsetof(struct fsp_m_config, package), 296 .propname = "fspm,package", 297 }, { 298 .type = FSP_UINT8, 299 .offset = offsetof(struct fsp_m_config, profile), 300 .propname = "fspm,profile", 301 }, { 302 .type = FSP_UINT8, 303 .offset = offsetof(struct fsp_m_config, memory_down), 304 .propname = "fspm,memory-down", 305 }, { 306 .type = FSP_UINT8, 307 .offset = offsetof(struct fsp_m_config, ddr3_l_page_size), 308 .propname = "fspm,ddr3-l-page-size", 309 }, { 310 .type = FSP_UINT8, 311 .offset = offsetof(struct fsp_m_config, ddr3_lasr), 312 .propname = "fspm,ddr3-lasr", 313 }, { 314 .type = FSP_UINT8, 315 .offset = offsetof(struct fsp_m_config, scrambler_support), 316 .propname = "fspm,scrambler-support", 317 }, { 318 .type = FSP_UINT8, 319 .offset = offsetof(struct fsp_m_config, interleaved_mode), 320 .propname = "fspm,interleaved-mode", 321 }, { 322 .type = FSP_UINT16, 323 .offset = offsetof(struct fsp_m_config, channel_hash_mask), 324 .propname = "fspm,channel-hash-mask", 325 }, { 326 .type = FSP_UINT16, 327 .offset = offsetof(struct fsp_m_config, slice_hash_mask), 328 .propname = "fspm,slice-hash-mask", 329 }, { 330 .type = FSP_UINT8, 331 .offset = offsetof(struct fsp_m_config, channels_slices_enable), 332 .propname = "fspm,channels-slices-enable", 333 }, { 334 .type = FSP_UINT8, 335 .offset = offsetof(struct fsp_m_config, min_ref_rate2x_enable), 336 .propname = "fspm,min-ref-rate2x-enable", 337 }, { 338 .type = FSP_UINT8, 339 .offset = offsetof(struct fsp_m_config, dual_rank_support_enable), 340 .propname = "fspm,dual-rank-support-enable", 341 }, { 342 .type = FSP_UINT8, 343 .offset = offsetof(struct fsp_m_config, rmt_mode), 344 .propname = "fspm,rmt-mode", 345 }, { 346 .type = FSP_UINT16, 347 .offset = offsetof(struct fsp_m_config, memory_size_limit), 348 .propname = "fspm,memory-size-limit", 349 }, { 350 .type = FSP_UINT16, 351 .offset = offsetof(struct fsp_m_config, low_memory_max_value), 352 .propname = "fspm,low-memory-max-value", 353 }, { 354 .type = FSP_UINT16, 355 .offset = offsetof(struct fsp_m_config, high_memory_max_value), 356 .propname = "fspm,high-memory-max-value", 357 }, { 358 .type = FSP_UINT8, 359 .offset = offsetof(struct fsp_m_config, disable_fast_boot), 360 .propname = "fspm,disable-fast-boot", 361 }, { 362 .type = FSP_UINT8, 363 .offset = offsetof(struct fsp_m_config, dimm0_spd_address), 364 .propname = "fspm,dimm0-spd-address", 365 }, { 366 .type = FSP_UINT8, 367 .offset = offsetof(struct fsp_m_config, dimm1_spd_address), 368 .propname = "fspm,dimm1-spd-address", 369 }, { 370 .type = FSP_UINT8, 371 .offset = offsetof(struct fsp_m_config, chan[0].rank_enable), 372 .propname = "fspm,ch0-rank-enable", 373 }, { 374 .type = FSP_UINT8, 375 .offset = offsetof(struct fsp_m_config, chan[0].device_width), 376 .propname = "fspm,ch0-device-width", 377 }, { 378 .type = FSP_UINT8, 379 .offset = offsetof(struct fsp_m_config, chan[0].dram_density), 380 .propname = "fspm,ch0-dram-density", 381 }, { 382 .type = FSP_UINT8, 383 .offset = offsetof(struct fsp_m_config, chan[0].option), 384 .propname = "fspm,ch0-option", 385 }, { 386 .type = FSP_UINT8, 387 .offset = offsetof(struct fsp_m_config, chan[0].odt_config), 388 .propname = "fspm,ch0-odt-config", 389 }, { 390 .type = FSP_UINT8, 391 .offset = offsetof(struct fsp_m_config, chan[0].tristate_clk1), 392 .propname = "fspm,ch0-tristate-clk1", 393 }, { 394 .type = FSP_UINT8, 395 .offset = offsetof(struct fsp_m_config, chan[0].mode2_n), 396 .propname = "fspm,ch0-mode2-n", 397 }, { 398 .type = FSP_UINT8, 399 .offset = offsetof(struct fsp_m_config, chan[0].odt_levels), 400 .propname = "fspm,ch0-odt-levels", 401 }, { 402 .type = FSP_UINT8, 403 .offset = offsetof(struct fsp_m_config, chan[1].rank_enable), 404 .propname = "fspm,ch1-rank-enable", 405 }, { 406 .type = FSP_UINT8, 407 .offset = offsetof(struct fsp_m_config, chan[1].device_width), 408 .propname = "fspm,ch1-device-width", 409 }, { 410 .type = FSP_UINT8, 411 .offset = offsetof(struct fsp_m_config, chan[1].dram_density), 412 .propname = "fspm,ch1-dram-density", 413 }, { 414 .type = FSP_UINT8, 415 .offset = offsetof(struct fsp_m_config, chan[1].option), 416 .propname = "fspm,ch1-option", 417 }, { 418 .type = FSP_UINT8, 419 .offset = offsetof(struct fsp_m_config, chan[1].odt_config), 420 .propname = "fspm,ch1-odt-config", 421 }, { 422 .type = FSP_UINT8, 423 .offset = offsetof(struct fsp_m_config, chan[1].tristate_clk1), 424 .propname = "fspm,ch1-tristate-clk1", 425 }, { 426 .type = FSP_UINT8, 427 .offset = offsetof(struct fsp_m_config, chan[1].mode2_n), 428 .propname = "fspm,ch1-mode2-n", 429 }, { 430 .type = FSP_UINT8, 431 .offset = offsetof(struct fsp_m_config, chan[1].odt_levels), 432 .propname = "fspm,ch1-odt-levels", 433 }, { 434 .type = FSP_UINT8, 435 .offset = offsetof(struct fsp_m_config, chan[2].rank_enable), 436 .propname = "fspm,ch2-rank-enable", 437 }, { 438 .type = FSP_UINT8, 439 .offset = offsetof(struct fsp_m_config, chan[2].device_width), 440 .propname = "fspm,ch2-device-width", 441 }, { 442 .type = FSP_UINT8, 443 .offset = offsetof(struct fsp_m_config, chan[2].dram_density), 444 .propname = "fspm,ch2-dram-density", 445 }, { 446 .type = FSP_UINT8, 447 .offset = offsetof(struct fsp_m_config, chan[2].option), 448 .propname = "fspm,ch2-option", 449 }, { 450 .type = FSP_UINT8, 451 .offset = offsetof(struct fsp_m_config, chan[2].odt_config), 452 .propname = "fspm,ch2-odt-config", 453 }, { 454 .type = FSP_UINT8, 455 .offset = offsetof(struct fsp_m_config, chan[2].tristate_clk1), 456 .propname = "fspm,ch2-tristate-clk1", 457 }, { 458 .type = FSP_UINT8, 459 .offset = offsetof(struct fsp_m_config, chan[2].mode2_n), 460 .propname = "fspm,ch2-mode2-n", 461 }, { 462 .type = FSP_UINT8, 463 .offset = offsetof(struct fsp_m_config, chan[2].odt_levels), 464 .propname = "fspm,ch2-odt-levels", 465 }, { 466 .type = FSP_UINT8, 467 .offset = offsetof(struct fsp_m_config, chan[3].rank_enable), 468 .propname = "fspm,ch3-rank-enable", 469 }, { 470 .type = FSP_UINT8, 471 .offset = offsetof(struct fsp_m_config, chan[3].device_width), 472 .propname = "fspm,ch3-device-width", 473 }, { 474 .type = FSP_UINT8, 475 .offset = offsetof(struct fsp_m_config, chan[3].dram_density), 476 .propname = "fspm,ch3-dram-density", 477 }, { 478 .type = FSP_UINT8, 479 .offset = offsetof(struct fsp_m_config, chan[3].option), 480 .propname = "fspm,ch3-option", 481 }, { 482 .type = FSP_UINT8, 483 .offset = offsetof(struct fsp_m_config, chan[3].odt_config), 484 .propname = "fspm,ch3-odt-config", 485 }, { 486 .type = FSP_UINT8, 487 .offset = offsetof(struct fsp_m_config, chan[3].tristate_clk1), 488 .propname = "fspm,ch3-tristate-clk1", 489 }, { 490 .type = FSP_UINT8, 491 .offset = offsetof(struct fsp_m_config, chan[3].mode2_n), 492 .propname = "fspm,ch3-mode2-n", 493 }, { 494 .type = FSP_UINT8, 495 .offset = offsetof(struct fsp_m_config, chan[3].odt_levels), 496 .propname = "fspm,ch3-odt-levels", 497 }, { 498 .type = FSP_UINT8, 499 .offset = offsetof(struct fsp_m_config, rmt_check_run), 500 .propname = "fspm,rmt-check-run", 501 }, { 502 .type = FSP_UINT16, 503 .offset = offsetof(struct fsp_m_config, 504 rmt_margin_check_scale_high_threshold), 505 .propname = "fspm,rmt-margin-check-scale-high-threshold", 506 }, { 507 .type = FSP_LPDDR4_SWIZZLE, 508 .offset = offsetof(struct fsp_m_config, ch_bit_swizzling), 509 .propname = "fspm,ch-bit-swizzling", 510 .count = SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling) / 511 SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling[0][0]) 512 }, { 513 .type = FSP_UINT32, 514 .offset = offsetof(struct fsp_m_config, msg_level_mask), 515 .propname = "fspm,msg-level-mask", 516 }, { 517 .type = FSP_UINT8, 518 .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_pin_num), 519 .propname = "fspm,pre-mem-gpio-table-pin-num", 520 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config, 521 pre_mem_gpio_table_pin_num), 522 }, { 523 .type = FSP_UINT32, 524 .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_ptr), 525 .propname = "fspm,pre-mem-gpio-table-ptr", 526 }, { 527 .type = FSP_UINT8, 528 .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_entry_num), 529 .propname = "fspm,pre-mem-gpio-table-entry-num", 530 }, { 531 .type = FSP_UINT8, 532 .offset = offsetof(struct fsp_m_config, enhance_port8xh_decoding), 533 .propname = "fspm,enhance-port8xh-decoding", 534 }, { 535 .type = FSP_UINT8, 536 .offset = offsetof(struct fsp_m_config, spd_write_enable), 537 .propname = "fspm,spd-write-enable", 538 }, { 539 .type = FSP_UINT8, 540 .offset = offsetof(struct fsp_m_config, mrc_data_saving), 541 .propname = "fspm,mrc-data-saving", 542 }, { 543 .type = FSP_UINT32, 544 .offset = offsetof(struct fsp_m_config, oem_loading_base), 545 .propname = "fspm,oem-loading-base", 546 }, { 547 .type = FSP_UINT8, 548 .offset = offsetof(struct fsp_m_config, oem_file_name), 549 .propname = "fspm,oem-file-name", 550 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config, oem_file_name), 551 }, { 552 .type = FSP_UINT32, 553 .offset = offsetof(struct fsp_m_config, mrc_boot_data_ptr), 554 .propname = "fspm,mrc-boot-data-ptr", 555 }, { 556 .type = FSP_UINT8, 557 .offset = offsetof(struct fsp_m_config, e_mmc_trace_len), 558 .propname = "fspm,emmc-trace-len", 559 }, { 560 .type = FSP_UINT8, 561 .offset = offsetof(struct fsp_m_config, skip_cse_rbp), 562 .propname = "fspm,skip-cse-rbp", 563 }, { 564 .type = FSP_UINT8, 565 .offset = offsetof(struct fsp_m_config, npk_en), 566 .propname = "fspm,npk-en", 567 }, { 568 .type = FSP_UINT8, 569 .offset = offsetof(struct fsp_m_config, fw_trace_en), 570 .propname = "fspm,fw-trace-en", 571 }, { 572 .type = FSP_UINT8, 573 .offset = offsetof(struct fsp_m_config, fw_trace_destination), 574 .propname = "fspm,fw-trace-destination", 575 }, { 576 .type = FSP_UINT8, 577 .offset = offsetof(struct fsp_m_config, recover_dump), 578 .propname = "fspm,recover-dump", 579 }, { 580 .type = FSP_UINT8, 581 .offset = offsetof(struct fsp_m_config, msc0_wrap), 582 .propname = "fspm,msc0-wrap", 583 }, { 584 .type = FSP_UINT8, 585 .offset = offsetof(struct fsp_m_config, msc1_wrap), 586 .propname = "fspm,msc1-wrap", 587 }, { 588 .type = FSP_UINT32, 589 .offset = offsetof(struct fsp_m_config, msc0_size), 590 .propname = "fspm,msc0-size", 591 }, { 592 .type = FSP_UINT32, 593 .offset = offsetof(struct fsp_m_config, msc1_size), 594 .propname = "fspm,msc1-size", 595 }, { 596 .type = FSP_UINT8, 597 .offset = offsetof(struct fsp_m_config, pti_mode), 598 .propname = "fspm,pti-mode", 599 }, { 600 .type = FSP_UINT8, 601 .offset = offsetof(struct fsp_m_config, pti_training), 602 .propname = "fspm,pti-training", 603 }, { 604 .type = FSP_UINT8, 605 .offset = offsetof(struct fsp_m_config, pti_speed), 606 .propname = "fspm,pti-speed", 607 }, { 608 .type = FSP_UINT8, 609 .offset = offsetof(struct fsp_m_config, punit_mlvl), 610 .propname = "fspm,punit-mlvl", 611 }, { 612 .type = FSP_UINT8, 613 .offset = offsetof(struct fsp_m_config, pmc_mlvl), 614 .propname = "fspm,pmc-mlvl", 615 }, { 616 .type = FSP_UINT8, 617 .offset = offsetof(struct fsp_m_config, sw_trace_en), 618 .propname = "fspm,sw-trace-en", 619 }, { 620 .type = FSP_UINT8, 621 .offset = offsetof(struct fsp_m_config, periodic_retraining_disable), 622 .propname = "fspm,periodic-retraining-disable", 623 }, { 624 .type = FSP_UINT8, 625 .offset = offsetof(struct fsp_m_config, enable_reset_system), 626 .propname = "fspm,enable-reset-system", 627 }, { 628 .type = FSP_UINT8, 629 .offset = offsetof(struct fsp_m_config, enable_s3_heci2), 630 .propname = "fspm,enable-s3-heci2", 631 }, { 632 .type = FSP_UINT32, 633 .offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr), 634 .propname = "fspm,variable-nvs-buffer-ptr", 635 }, { 636 .type = FSP_UINT64, 637 .offset = offsetof(struct fsp_m_config, start_timer_ticker_of_pfet_assert), 638 .propname = "fspm,start-timer-ticker-of-pfet-assert", 639 }, { 640 .type = FSP_UINT8, .offset = offsetof(struct fsp_m_config, rt_en), 641 .propname = "fspm,rt-en", 642 }, { 643 .type = FSP_UINT8, 644 .offset = offsetof(struct fsp_m_config, skip_pcie_power_sequence), 645 .propname = "fspm,skip-pcie-power-sequence", 646 }, { 647 .propname = NULL 648 } 649}; 650 651int fsp_m_update_config_from_dtb(ofnode node, struct fsp_m_config *cfg) 652{ 653 return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_m_bindings); 654} 655#endif 656 657#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) 658const struct fsp_binding fsp_s_bindings[] = { 659 { 660 .type = FSP_UINT8, 661 .offset = offsetof(struct fsp_s_config, active_processor_cores), 662 .propname = "fsps,active-processor-cores", 663 }, { 664 .type = FSP_UINT8, 665 .offset = offsetof(struct fsp_s_config, disable_core1), 666 .propname = "fsps,disable-core1", 667 }, { 668 .type = FSP_UINT8, 669 .offset = offsetof(struct fsp_s_config, disable_core2), 670 .propname = "fsps,disable-core2", 671 }, { 672 .type = FSP_UINT8, 673 .offset = offsetof(struct fsp_s_config, disable_core3), 674 .propname = "fsps,disable-core3", 675 }, { 676 .type = FSP_UINT8, 677 .offset = offsetof(struct fsp_s_config, vmx_enable), 678 .propname = "fsps,vmx-enable", 679 }, { 680 .type = FSP_UINT8, 681 .offset = offsetof(struct fsp_s_config, proc_trace_mem_size), 682 .propname = "fsps,proc-trace-mem-size", 683 }, { 684 .type = FSP_UINT8, 685 .offset = offsetof(struct fsp_s_config, proc_trace_enable), 686 .propname = "fsps,proc-trace-enable", 687 }, { 688 .type = FSP_UINT8, 689 .offset = offsetof(struct fsp_s_config, eist), 690 .propname = "fsps,eist", 691 }, { 692 .type = FSP_UINT8, 693 .offset = offsetof(struct fsp_s_config, boot_p_state), 694 .propname = "fsps,boot-p-state", 695 }, { 696 .type = FSP_UINT8, 697 .offset = offsetof(struct fsp_s_config, enable_cx), 698 .propname = "fsps,enable-cx", 699 }, { 700 .type = FSP_UINT8, 701 .offset = offsetof(struct fsp_s_config, c1e), 702 .propname = "fsps,c1e", 703 }, { 704 .type = FSP_UINT8, 705 .offset = offsetof(struct fsp_s_config, bi_proc_hot), 706 .propname = "fsps,bi-proc-hot", 707 }, { 708 .type = FSP_UINT8, 709 .offset = offsetof(struct fsp_s_config, pkg_c_state_limit), 710 .propname = "fsps,pkg-c-state-limit", 711 }, { 712 .type = FSP_UINT8, 713 .offset = offsetof(struct fsp_s_config, c_state_auto_demotion), 714 .propname = "fsps,c-state-auto-demotion", 715 }, { 716 .type = FSP_UINT8, 717 .offset = offsetof(struct fsp_s_config, c_state_un_demotion), 718 .propname = "fsps,c-state-un-demotion", 719 }, { 720 .type = FSP_UINT8, 721 .offset = offsetof(struct fsp_s_config, max_core_c_state), 722 .propname = "fsps,max-core-c-state", 723 }, { 724 .type = FSP_UINT8, 725 .offset = offsetof(struct fsp_s_config, pkg_c_state_demotion), 726 .propname = "fsps,pkg-c-state-demotion", 727 }, { 728 .type = FSP_UINT8, 729 .offset = offsetof(struct fsp_s_config, pkg_c_state_un_demotion), 730 .propname = "fsps,pkg-c-state-un-demotion", 731 }, { 732 .type = FSP_UINT8, 733 .offset = offsetof(struct fsp_s_config, turbo_mode), 734 .propname = "fsps,turbo-mode", 735 }, { 736 .type = FSP_UINT8, 737 .offset = offsetof(struct fsp_s_config, hda_verb_table_entry_num), 738 .propname = "fsps,hda-verb-table-entry-num", 739 }, { 740 .type = FSP_UINT32, 741 .offset = offsetof(struct fsp_s_config, hda_verb_table_ptr), 742 .propname = "fsps,hda-verb-table-ptr", 743 }, { 744 .type = FSP_UINT8, 745 .offset = offsetof(struct fsp_s_config, p2sb_unhide), 746 .propname = "fsps,p2sb-unhide", 747 }, { 748 .type = FSP_UINT8, 749 .offset = offsetof(struct fsp_s_config, ipu_en), 750 .propname = "fsps,ipu-en", 751 }, { 752 .type = FSP_UINT8, 753 .offset = offsetof(struct fsp_s_config, ipu_acpi_mode), 754 .propname = "fsps,ipu-acpi-mode", 755 }, { 756 .type = FSP_UINT8, 757 .offset = offsetof(struct fsp_s_config, force_wake), 758 .propname = "fsps,force-wake", 759 }, { 760 .type = FSP_UINT32, 761 .offset = offsetof(struct fsp_s_config, gtt_mm_adr), 762 .propname = "fsps,gtt-mm-adr", 763 }, { 764 .type = FSP_UINT32, 765 .offset = offsetof(struct fsp_s_config, gm_adr), 766 .propname = "fsps,gm-adr", 767 }, { 768 .type = FSP_UINT8, 769 .offset = offsetof(struct fsp_s_config, pavp_lock), 770 .propname = "fsps,pavp-lock", 771 }, { 772 .type = FSP_UINT8, 773 .offset = offsetof(struct fsp_s_config, graphics_freq_modify), 774 .propname = "fsps,graphics-freq-modify", 775 }, { 776 .type = FSP_UINT8, 777 .offset = offsetof(struct fsp_s_config, graphics_freq_req), 778 .propname = "fsps,graphics-freq-req", 779 }, { 780 .type = FSP_UINT8, 781 .offset = offsetof(struct fsp_s_config, graphics_video_freq), 782 .propname = "fsps,graphics-video-freq", 783 }, { 784 .type = FSP_UINT8, 785 .offset = offsetof(struct fsp_s_config, pm_lock), 786 .propname = "fsps,pm-lock", 787 }, { 788 .type = FSP_UINT8, 789 .offset = offsetof(struct fsp_s_config, dop_clock_gating), 790 .propname = "fsps,dop-clock-gating", 791 }, { 792 .type = FSP_UINT8, 793 .offset = offsetof(struct fsp_s_config, unsolicited_attack_override), 794 .propname = "fsps,unsolicited-attack-override", 795 }, { 796 .type = FSP_UINT8, 797 .offset = offsetof(struct fsp_s_config, wopcm_support), 798 .propname = "fsps,wopcm-support", 799 }, { 800 .type = FSP_UINT8, 801 .offset = offsetof(struct fsp_s_config, wopcm_size), 802 .propname = "fsps,wopcm-size", 803 }, { 804 .type = FSP_UINT8, 805 .offset = offsetof(struct fsp_s_config, power_gating), 806 .propname = "fsps,power-gating", 807 }, { 808 .type = FSP_UINT8, 809 .offset = offsetof(struct fsp_s_config, unit_level_clock_gating), 810 .propname = "fsps,unit-level-clock-gating", 811 }, { 812 .type = FSP_UINT8, 813 .offset = offsetof(struct fsp_s_config, fast_boot), 814 .propname = "fsps,fast-boot", 815 }, { 816 .type = FSP_UINT8, 817 .offset = offsetof(struct fsp_s_config, dyn_sr), 818 .propname = "fsps,dyn-sr", 819 }, { 820 .type = FSP_UINT8, 821 .offset = offsetof(struct fsp_s_config, sa_ipu_enable), 822 .propname = "fsps,sa-ipu-enable", 823 }, { 824 .type = FSP_UINT8, 825 .offset = offsetof(struct fsp_s_config, pm_support), 826 .propname = "fsps,pm-support", 827 }, { 828 .type = FSP_UINT8, 829 .offset = offsetof(struct fsp_s_config, enable_render_standby), 830 .propname = "fsps,enable-render-standby", 831 }, { 832 .type = FSP_UINT32, 833 .offset = offsetof(struct fsp_s_config, logo_size), 834 .propname = "fsps,logo-size", 835 }, { 836 .type = FSP_UINT32, 837 .offset = offsetof(struct fsp_s_config, logo_ptr), 838 .propname = "fsps,logo-ptr", 839 }, { 840 .type = FSP_UINT32, 841 .offset = offsetof(struct fsp_s_config, graphics_config_ptr), 842 .propname = "fsps,graphics-config-ptr", 843 }, { 844 .type = FSP_UINT8, 845 .offset = offsetof(struct fsp_s_config, pavp_enable), 846 .propname = "fsps,pavp-enable", 847 }, { 848 .type = FSP_UINT8, 849 .offset = offsetof(struct fsp_s_config, pavp_pr3), 850 .propname = "fsps,pavp-pr3", 851 }, { 852 .type = FSP_UINT8, 853 .offset = offsetof(struct fsp_s_config, cd_clock), 854 .propname = "fsps,cd-clock", 855 }, { 856 .type = FSP_UINT8, 857 .offset = offsetof(struct fsp_s_config, pei_graphics_peim_init), 858 .propname = "fsps,pei-graphics-peim-init", 859 }, { 860 .type = FSP_UINT8, 861 .offset = offsetof(struct fsp_s_config, write_protection_enable), 862 .propname = "fsps,write-protection-enable", 863 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 864 write_protection_enable), 865 }, { 866 .type = FSP_UINT8, 867 .offset = offsetof(struct fsp_s_config, read_protection_enable), 868 .propname = "fsps,read-protection-enable", 869 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 870 read_protection_enable), 871 }, { 872 .type = FSP_UINT16, 873 .offset = offsetof(struct fsp_s_config, protected_range_limit), 874 .propname = "fsps,protected-range-limit", 875 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 876 protected_range_limit), 877 }, { 878 .type = FSP_UINT16, 879 .offset = offsetof(struct fsp_s_config, protected_range_base), 880 .propname = "fsps,protected-range-base", 881 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 882 protected_range_base), 883 }, { 884 .type = FSP_UINT8, 885 .offset = offsetof(struct fsp_s_config, gmm), 886 .propname = "fsps,gmm", 887 }, { 888 .type = FSP_UINT8, 889 .offset = offsetof(struct fsp_s_config, clk_gating_pgcb_clk_trunk), 890 .propname = "fsps,clk-gating-pgcb-clk-trunk", 891 }, { 892 .type = FSP_UINT8, 893 .offset = offsetof(struct fsp_s_config, clk_gating_sb), 894 .propname = "fsps,clk-gating-sb", 895 }, { 896 .type = FSP_UINT8, 897 .offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_trunk), 898 .propname = "fsps,clk-gating-sb-clk-trunk", 899 }, { 900 .type = FSP_UINT8, 901 .offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_partition), 902 .propname = "fsps,clk-gating-sb-clk-partition", 903 }, { 904 .type = FSP_UINT8, 905 .offset = offsetof(struct fsp_s_config, clk_gating_core), 906 .propname = "fsps,clk-gating-core", 907 }, { 908 .type = FSP_UINT8, 909 .offset = offsetof(struct fsp_s_config, clk_gating_dma), 910 .propname = "fsps,clk-gating-dma", 911 }, { 912 .type = FSP_UINT8, 913 .offset = offsetof(struct fsp_s_config, clk_gating_reg_access), 914 .propname = "fsps,clk-gating-reg-access", 915 }, { 916 .type = FSP_UINT8, 917 .offset = offsetof(struct fsp_s_config, clk_gating_host), 918 .propname = "fsps,clk-gating-host", 919 }, { 920 .type = FSP_UINT8, 921 .offset = offsetof(struct fsp_s_config, clk_gating_partition), 922 .propname = "fsps,clk-gating-partition", 923 }, { 924 .type = FSP_UINT8, 925 .offset = offsetof(struct fsp_s_config, clk_gating_trunk), 926 .propname = "fsps,clk-gating-trunk", 927 }, { 928 .type = FSP_UINT8, 929 .offset = offsetof(struct fsp_s_config, hda_enable), 930 .propname = "fsps,hda-enable", 931 }, { 932 .type = FSP_UINT8, 933 .offset = offsetof(struct fsp_s_config, dsp_enable), 934 .propname = "fsps,dsp-enable", 935 }, { 936 .type = FSP_UINT8, 937 .offset = offsetof(struct fsp_s_config, pme), 938 .propname = "fsps,pme", 939 }, { 940 .type = FSP_UINT8, 941 .offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_ownership), 942 .propname = "fsps,hd-audio-io-buffer-ownership", 943 }, { 944 .type = FSP_UINT8, 945 .offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_voltage), 946 .propname = "fsps,hd-audio-io-buffer-voltage", 947 }, { 948 .type = FSP_UINT8, 949 .offset = offsetof(struct fsp_s_config, hd_audio_vc_type), 950 .propname = "fsps,hd-audio-vc-type", 951 }, { 952 .type = FSP_UINT8, 953 .offset = offsetof(struct fsp_s_config, hd_audio_link_frequency), 954 .propname = "fsps,hd-audio-link-frequency", 955 }, { 956 .type = FSP_UINT8, 957 .offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_frequency), 958 .propname = "fsps,hd-audio-i-disp-link-frequency", 959 }, { 960 .type = FSP_UINT8, 961 .offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_tmode), 962 .propname = "fsps,hd-audio-i-disp-link-tmode", 963 }, { 964 .type = FSP_UINT8, 965 .offset = offsetof(struct fsp_s_config, dsp_endpoint_dmic), 966 .propname = "fsps,dsp-endpoint-dmic", 967 }, { 968 .type = FSP_UINT8, 969 .offset = offsetof(struct fsp_s_config, dsp_endpoint_bluetooth), 970 .propname = "fsps,dsp-endpoint-bluetooth", 971 }, { 972 .type = FSP_UINT8, 973 .offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_skp), 974 .propname = "fsps,dsp-endpoint-i2s-skp", 975 }, { 976 .type = FSP_UINT8, 977 .offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_hp), 978 .propname = "fsps,dsp-endpoint-i2s-hp", 979 }, { 980 .type = FSP_UINT8, 981 .offset = offsetof(struct fsp_s_config, audio_ctl_pwr_gate), 982 .propname = "fsps,audio-ctl-pwr-gate", 983 }, { 984 .type = FSP_UINT8, 985 .offset = offsetof(struct fsp_s_config, audio_dsp_pwr_gate), 986 .propname = "fsps,audio-dsp-pwr-gate", 987 }, { 988 .type = FSP_UINT8, 989 .offset = offsetof(struct fsp_s_config, mmt), 990 .propname = "fsps,mmt", 991 }, { 992 .type = FSP_UINT8, 993 .offset = offsetof(struct fsp_s_config, hmt), 994 .propname = "fsps,hmt", 995 }, { 996 .type = FSP_UINT8, 997 .offset = offsetof(struct fsp_s_config, hd_audio_pwr_gate), 998 .propname = "fsps,hd-audio-pwr-gate", 999 }, { 1000 .type = FSP_UINT8, 1001 .offset = offsetof(struct fsp_s_config, hd_audio_clk_gate), 1002 .propname = "fsps,hd-audio-clk-gate", 1003 }, { 1004 .type = FSP_UINT32, 1005 .offset = offsetof(struct fsp_s_config, dsp_feature_mask), 1006 .propname = "fsps,dsp-feature-mask", 1007 }, { 1008 .type = FSP_UINT32, 1009 .offset = offsetof(struct fsp_s_config, dsp_pp_module_mask), 1010 .propname = "fsps,dsp-pp-module-mask", 1011 }, { 1012 .type = FSP_UINT8, 1013 .offset = offsetof(struct fsp_s_config, bios_cfg_lock_down), 1014 .propname = "fsps,bios-cfg-lock-down", 1015 }, { 1016 .type = FSP_UINT8, 1017 .offset = offsetof(struct fsp_s_config, hpet), 1018 .propname = "fsps,hpet", 1019 }, { 1020 .type = FSP_UINT8, 1021 .offset = offsetof(struct fsp_s_config, hpet_bdf_valid), 1022 .propname = "fsps,hpet-bdf-valid", 1023 }, { 1024 .type = FSP_UINT8, 1025 .offset = offsetof(struct fsp_s_config, hpet_bus_number), 1026 .propname = "fsps,hpet-bus-number", 1027 }, { 1028 .type = FSP_UINT8, 1029 .offset = offsetof(struct fsp_s_config, hpet_device_number), 1030 .propname = "fsps,hpet-device-number", 1031 }, { 1032 .type = FSP_UINT8, 1033 .offset = offsetof(struct fsp_s_config, hpet_function_number), 1034 .propname = "fsps,hpet-function-number", 1035 }, { 1036 .type = FSP_UINT8, 1037 .offset = offsetof(struct fsp_s_config, io_apic_bdf_valid), 1038 .propname = "fsps,io-apic-bdf-valid", 1039 }, { 1040 .type = FSP_UINT8, 1041 .offset = offsetof(struct fsp_s_config, io_apic_bus_number), 1042 .propname = "fsps,io-apic-bus-number", 1043 }, { 1044 .type = FSP_UINT8, 1045 .offset = offsetof(struct fsp_s_config, io_apic_device_number), 1046 .propname = "fsps,io-apic-device-number", 1047 }, { 1048 .type = FSP_UINT8, 1049 .offset = offsetof(struct fsp_s_config, io_apic_function_number), 1050 .propname = "fsps,io-apic-function-number", 1051 }, { 1052 .type = FSP_UINT8, 1053 .offset = offsetof(struct fsp_s_config, io_apic_entry24_119), 1054 .propname = "fsps,io-apic-entry24-119", 1055 }, { 1056 .type = FSP_UINT8, 1057 .offset = offsetof(struct fsp_s_config, io_apic_id), 1058 .propname = "fsps,io-apic-id", 1059 }, { 1060 .type = FSP_UINT8, 1061 .offset = offsetof(struct fsp_s_config, io_apic_range_select), 1062 .propname = "fsps,io-apic-range-select", 1063 }, { 1064 .type = FSP_UINT8, 1065 .offset = offsetof(struct fsp_s_config, ish_enable), 1066 .propname = "fsps,ish-enable", 1067 }, { 1068 .type = FSP_UINT8, 1069 .offset = offsetof(struct fsp_s_config, bios_interface), 1070 .propname = "fsps,bios-interface", 1071 }, { 1072 .type = FSP_UINT8, 1073 .offset = offsetof(struct fsp_s_config, bios_lock), 1074 .propname = "fsps,bios-lock", 1075 }, { 1076 .type = FSP_UINT8, 1077 .offset = offsetof(struct fsp_s_config, spi_eiss), 1078 .propname = "fsps,spi-eiss", 1079 }, { 1080 .type = FSP_UINT8, 1081 .offset = offsetof(struct fsp_s_config, bios_lock_sw_smi_number), 1082 .propname = "fsps,bios-lock-sw-smi-number", 1083 }, { 1084 .type = FSP_UINT8, 1085 .offset = offsetof(struct fsp_s_config, lpss_s0ix_enable), 1086 .propname = "fsps,lpss-s0ix-enable", 1087 }, { 1088 .type = FSP_UINT8, 1089 .offset = offsetof(struct fsp_s_config, i2c_clk_gate_cfg), 1090 .propname = "fsps,i2c-clk-gate-cfg", 1091 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, i2c_clk_gate_cfg), 1092 }, { 1093 .type = FSP_UINT8, 1094 .offset = offsetof(struct fsp_s_config, hsuart_clk_gate_cfg), 1095 .propname = "fsps,hsuart-clk-gate-cfg", 1096 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, hsuart_clk_gate_cfg), 1097 }, { 1098 .type = FSP_UINT8, 1099 .offset = offsetof(struct fsp_s_config, spi_clk_gate_cfg), 1100 .propname = "fsps,spi-clk-gate-cfg", 1101 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, spi_clk_gate_cfg), 1102 }, { 1103 .type = FSP_UINT8, 1104 .offset = offsetof(struct fsp_s_config, i2c0_enable), 1105 .propname = "fsps,i2c0-enable", 1106 }, { 1107 .type = FSP_UINT8, 1108 .offset = offsetof(struct fsp_s_config, i2c1_enable), 1109 .propname = "fsps,i2c1-enable", 1110 }, { 1111 .type = FSP_UINT8, 1112 .offset = offsetof(struct fsp_s_config, i2c2_enable), 1113 .propname = "fsps,i2c2-enable", 1114 }, { 1115 .type = FSP_UINT8, 1116 .offset = offsetof(struct fsp_s_config, i2c3_enable), 1117 .propname = "fsps,i2c3-enable", 1118 }, { 1119 .type = FSP_UINT8, 1120 .offset = offsetof(struct fsp_s_config, i2c4_enable), 1121 .propname = "fsps,i2c4-enable", 1122 }, { 1123 .type = FSP_UINT8, 1124 .offset = offsetof(struct fsp_s_config, i2c5_enable), 1125 .propname = "fsps,i2c5-enable", 1126 }, { 1127 .type = FSP_UINT8, 1128 .offset = offsetof(struct fsp_s_config, i2c6_enable), 1129 .propname = "fsps,i2c6-enable", 1130 }, { 1131 .type = FSP_UINT8, 1132 .offset = offsetof(struct fsp_s_config, i2c7_enable), 1133 .propname = "fsps,i2c7-enable", 1134 }, { 1135 .type = FSP_UINT8, 1136 .offset = offsetof(struct fsp_s_config, hsuart0_enable), 1137 .propname = "fsps,hsuart0-enable", 1138 }, { 1139 .type = FSP_UINT8, 1140 .offset = offsetof(struct fsp_s_config, hsuart1_enable), 1141 .propname = "fsps,hsuart1-enable", 1142 }, { 1143 .type = FSP_UINT8, 1144 .offset = offsetof(struct fsp_s_config, hsuart2_enable), 1145 .propname = "fsps,hsuart2-enable", 1146 }, { 1147 .type = FSP_UINT8, 1148 .offset = offsetof(struct fsp_s_config, hsuart3_enable), 1149 .propname = "fsps,hsuart3-enable", 1150 }, { 1151 .type = FSP_UINT8, 1152 .offset = offsetof(struct fsp_s_config, spi0_enable), 1153 .propname = "fsps,spi0-enable", 1154 }, { 1155 .type = FSP_UINT8, 1156 .offset = offsetof(struct fsp_s_config, spi1_enable), 1157 .propname = "fsps,spi1-enable", 1158 }, { 1159 .type = FSP_UINT8, 1160 .offset = offsetof(struct fsp_s_config, spi2_enable), 1161 .propname = "fsps,spi2-enable", 1162 }, { 1163 .type = FSP_UINT8, 1164 .offset = offsetof(struct fsp_s_config, os_dbg_enable), 1165 .propname = "fsps,os-dbg-enable", 1166 }, { 1167 .type = FSP_UINT8, 1168 .offset = offsetof(struct fsp_s_config, dci_en), 1169 .propname = "fsps,dci-en", 1170 }, { 1171 .type = FSP_UINT32, 1172 .offset = offsetof(struct fsp_s_config, 1173 uart2_kernel_debug_base_address), 1174 .propname = "fsps,uart2-kernel-debug-base-address", 1175 }, { 1176 .type = FSP_UINT8, 1177 .offset = offsetof(struct fsp_s_config, pcie_clock_gating_disabled), 1178 .propname = "fsps,pcie-clock-gating-disabled", 1179 }, { 1180 .type = FSP_UINT8, 1181 .offset = offsetof(struct fsp_s_config, pcie_root_port8xh_decode), 1182 .propname = "fsps,pcie-root-port8xh-decode", 1183 }, { 1184 .type = FSP_UINT8, 1185 .offset = offsetof(struct fsp_s_config, pcie8xh_decode_port_index), 1186 .propname = "fsps,pcie8xh-decode-port-index", 1187 }, { 1188 .type = FSP_UINT8, 1189 .offset = offsetof(struct fsp_s_config, 1190 pcie_root_port_peer_memory_write_enable), 1191 .propname = "fsps,pcie-root-port-peer-memory-write-enable", 1192 }, { 1193 .type = FSP_UINT8, 1194 .offset = offsetof(struct fsp_s_config, pcie_aspm_sw_smi_number), 1195 .propname = "fsps,pcie-aspm-sw-smi-number", 1196 }, { 1197 .type = FSP_UINT8, 1198 .offset = offsetof(struct fsp_s_config, pcie_root_port_en), 1199 .propname = "fsps,pcie-root-port-en", 1200 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_root_port_en), 1201 }, { 1202 .type = FSP_UINT8, 1203 .offset = offsetof(struct fsp_s_config, pcie_rp_hide), 1204 .propname = "fsps,pcie-rp-hide", 1205 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hide), 1206 }, { 1207 .type = FSP_UINT8, 1208 .offset = offsetof(struct fsp_s_config, pcie_rp_slot_implemented), 1209 .propname = "fsps,pcie-rp-slot-implemented", 1210 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1211 pcie_rp_slot_implemented), 1212 }, { 1213 .type = FSP_UINT8, 1214 .offset = offsetof(struct fsp_s_config, pcie_rp_hot_plug), 1215 .propname = "fsps,pcie-rp-hot-plug", 1216 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hot_plug), 1217 }, { 1218 .type = FSP_UINT8, 1219 .offset = offsetof(struct fsp_s_config, pcie_rp_pm_sci), 1220 .propname = "fsps,pcie-rp-pm-sci", 1221 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_pm_sci), 1222 }, { 1223 .type = FSP_UINT8, 1224 .offset = offsetof(struct fsp_s_config, pcie_rp_ext_sync), 1225 .propname = "fsps,pcie-rp-ext-sync", 1226 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ext_sync), 1227 }, { 1228 .type = FSP_UINT8, 1229 .offset = offsetof(struct fsp_s_config, 1230 pcie_rp_transmitter_half_swing), 1231 .propname = "fsps,pcie-rp-transmitter-half-swing", 1232 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1233 pcie_rp_transmitter_half_swing), 1234 }, { 1235 .type = FSP_UINT8, 1236 .offset = offsetof(struct fsp_s_config, pcie_rp_acs_enabled), 1237 .propname = "fsps,pcie-rp-acs-enabled", 1238 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_acs_enabled), 1239 }, { 1240 .type = FSP_UINT8, 1241 .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_supported), 1242 .propname = "fsps,pcie-rp-clk-req-supported", 1243 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1244 pcie_rp_clk_req_supported), 1245 }, { 1246 .type = FSP_UINT8, 1247 .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_number), 1248 .propname = "fsps,pcie-rp-clk-req-number", 1249 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1250 pcie_rp_clk_req_number), 1251 }, { 1252 .type = FSP_UINT8, 1253 .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_detect), 1254 .propname = "fsps,pcie-rp-clk-req-detect", 1255 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1256 pcie_rp_clk_req_detect), 1257 }, { 1258 .type = FSP_UINT8, 1259 .offset = offsetof(struct fsp_s_config, advanced_error_reporting), 1260 .propname = "fsps,advanced-error-reporting", 1261 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1262 advanced_error_reporting), 1263 }, { 1264 .type = FSP_UINT8, 1265 .offset = offsetof(struct fsp_s_config, pme_interrupt), 1266 .propname = "fsps,pme-interrupt", 1267 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pme_interrupt), 1268 }, { 1269 .type = FSP_UINT8, 1270 .offset = offsetof(struct fsp_s_config, unsupported_request_report), 1271 .propname = "fsps,unsupported-request-report", 1272 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1273 unsupported_request_report), 1274 }, { 1275 .type = FSP_UINT8, 1276 .offset = offsetof(struct fsp_s_config, fatal_error_report), 1277 .propname = "fsps,fatal-error-report", 1278 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, fatal_error_report), 1279 }, { 1280 .type = FSP_UINT8, 1281 .offset = offsetof(struct fsp_s_config, no_fatal_error_report), 1282 .propname = "fsps,no-fatal-error-report", 1283 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1284 no_fatal_error_report), 1285 }, { 1286 .type = FSP_UINT8, 1287 .offset = offsetof(struct fsp_s_config, correctable_error_report), 1288 .propname = "fsps,correctable-error-report", 1289 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1290 correctable_error_report), 1291 }, { 1292 .type = FSP_UINT8, 1293 .offset = offsetof(struct fsp_s_config, 1294 system_error_on_fatal_error), 1295 .propname = "fsps,system-error-on-fatal-error", 1296 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1297 system_error_on_fatal_error), 1298 }, { 1299 .type = FSP_UINT8, 1300 .offset = offsetof(struct fsp_s_config, 1301 system_error_on_non_fatal_error), 1302 .propname = "fsps,system-error-on-non-fatal-error", 1303 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1304 system_error_on_non_fatal_error), 1305 }, { 1306 .type = FSP_UINT8, 1307 .offset = offsetof(struct fsp_s_config, 1308 system_error_on_correctable_error), 1309 .propname = "fsps,system-error-on-correctable-error", 1310 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1311 system_error_on_correctable_error), 1312 }, { 1313 .type = FSP_UINT8, 1314 .offset = offsetof(struct fsp_s_config, pcie_rp_speed), 1315 .propname = "fsps,pcie-rp-speed", 1316 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_speed), 1317 }, { 1318 .type = FSP_UINT8, 1319 .offset = offsetof(struct fsp_s_config, physical_slot_number), 1320 .propname = "fsps,physical-slot-number", 1321 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1322 physical_slot_number), 1323 }, { 1324 .type = FSP_UINT8, 1325 .offset = offsetof(struct fsp_s_config, pcie_rp_completion_timeout), 1326 .propname = "fsps,pcie-rp-completion-timeout", 1327 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1328 pcie_rp_completion_timeout), 1329 }, { 1330 .type = FSP_UINT8, 1331 .offset = offsetof(struct fsp_s_config, ptm_enable), 1332 .propname = "fsps,ptm-enable", 1333 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ptm_enable), 1334 }, { 1335 .type = FSP_UINT8, 1336 .offset = offsetof(struct fsp_s_config, pcie_rp_aspm), 1337 .propname = "fsps,pcie-rp-aspm", 1338 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_aspm), 1339 }, { 1340 .type = FSP_UINT8, 1341 .offset = offsetof(struct fsp_s_config, pcie_rp_l1_substates), 1342 .propname = "fsps,pcie-rp-l1-substates", 1343 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1344 pcie_rp_l1_substates), 1345 }, { 1346 .type = FSP_UINT8, 1347 .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_enable), 1348 .propname = "fsps,pcie-rp-ltr-enable", 1349 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ltr_enable), 1350 }, { 1351 .type = FSP_UINT8, 1352 .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_config_lock), 1353 .propname = "fsps,pcie-rp-ltr-config-lock", 1354 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1355 pcie_rp_ltr_config_lock), 1356 }, { 1357 .type = FSP_UINT8, 1358 .offset = offsetof(struct fsp_s_config, pme_b0_s5_dis), 1359 .propname = "fsps,pme-b0-s5-dis", 1360 }, { 1361 .type = FSP_UINT8, 1362 .offset = offsetof(struct fsp_s_config, pci_clock_run), 1363 .propname = "fsps,pci-clock-run", 1364 }, { 1365 .type = FSP_UINT8, 1366 .offset = offsetof(struct fsp_s_config, timer8254_clk_setting), 1367 .propname = "fsps,timer8254-clk-setting", 1368 }, { 1369 .type = FSP_UINT8, 1370 .offset = offsetof(struct fsp_s_config, enable_sata), 1371 .propname = "fsps,enable-sata", 1372 }, { 1373 .type = FSP_UINT8, 1374 .offset = offsetof(struct fsp_s_config, sata_mode), 1375 .propname = "fsps,sata-mode", 1376 }, { 1377 .type = FSP_UINT8, 1378 .offset = offsetof(struct fsp_s_config, sata_salp_support), 1379 .propname = "fsps,sata-salp-support", 1380 }, { 1381 .type = FSP_UINT8, 1382 .offset = offsetof(struct fsp_s_config, sata_pwr_opt_enable), 1383 .propname = "fsps,sata-pwr-opt-enable", 1384 }, { 1385 .type = FSP_UINT8, 1386 .offset = offsetof(struct fsp_s_config, e_sata_speed_limit), 1387 .propname = "fsps,e-sata-speed-limit", 1388 }, { 1389 .type = FSP_UINT8, 1390 .offset = offsetof(struct fsp_s_config, speed_limit), 1391 .propname = "fsps,speed-limit", 1392 }, { 1393 .type = FSP_UINT8, 1394 .offset = offsetof(struct fsp_s_config, sata_ports_enable), 1395 .propname = "fsps,sata-ports-enable", 1396 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_enable), 1397 }, { 1398 .type = FSP_UINT8, 1399 .offset = offsetof(struct fsp_s_config, sata_ports_dev_slp), 1400 .propname = "fsps,sata-ports-dev-slp", 1401 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dev_slp), 1402 }, { 1403 .type = FSP_UINT8, 1404 .offset = offsetof(struct fsp_s_config, sata_ports_hot_plug), 1405 .propname = "fsps,sata-ports-hot-plug", 1406 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_hot_plug), 1407 }, { 1408 .type = FSP_UINT8, 1409 .offset = offsetof(struct fsp_s_config, sata_ports_interlock_sw), 1410 .propname = "fsps,sata-ports-interlock-sw", 1411 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1412 sata_ports_interlock_sw), 1413 }, { 1414 .type = FSP_UINT8, 1415 .offset = offsetof(struct fsp_s_config, sata_ports_external), 1416 .propname = "fsps,sata-ports-external", 1417 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_external), 1418 }, { 1419 .type = FSP_UINT8, 1420 .offset = offsetof(struct fsp_s_config, sata_ports_spin_up), 1421 .propname = "fsps,sata-ports-spin-up", 1422 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_spin_up), 1423 }, { 1424 .type = FSP_UINT8, 1425 .offset = offsetof(struct fsp_s_config, sata_ports_solid_state_drive), 1426 .propname = "fsps,sata-ports-solid-state-drive", 1427 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1428 sata_ports_solid_state_drive), 1429 }, { 1430 .type = FSP_UINT8, 1431 .offset = offsetof(struct fsp_s_config, sata_ports_enable_dito_config), 1432 .propname = "fsps,sata-ports-enable-dito-config", 1433 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1434 sata_ports_enable_dito_config), 1435 }, { 1436 .type = FSP_UINT8, 1437 .offset = offsetof(struct fsp_s_config, sata_ports_dm_val), 1438 .propname = "fsps,sata-ports-dm-val", 1439 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dm_val), 1440 }, { 1441 .type = FSP_UINT16, 1442 .offset = offsetof(struct fsp_s_config, sata_ports_dito_val), 1443 .propname = "fsps,sata-ports-dito-val", 1444 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dito_val), 1445 }, { 1446 .type = FSP_UINT16, 1447 .offset = offsetof(struct fsp_s_config, sub_system_vendor_id), 1448 .propname = "fsps,sub-system-vendor-id", 1449 }, { 1450 .type = FSP_UINT16, 1451 .offset = offsetof(struct fsp_s_config, sub_system_id), 1452 .propname = "fsps,sub-system-id", 1453 }, { 1454 .type = FSP_UINT8, 1455 .offset = offsetof(struct fsp_s_config, crid_settings), 1456 .propname = "fsps,crid-settings", 1457 }, { 1458 .type = FSP_UINT8, 1459 .offset = offsetof(struct fsp_s_config, reset_select), 1460 .propname = "fsps,reset-select", 1461 }, { 1462 .type = FSP_UINT8, 1463 .offset = offsetof(struct fsp_s_config, sdcard_enabled), 1464 .propname = "fsps,sdcard-enabled", 1465 }, { 1466 .type = FSP_UINT8, 1467 .offset = offsetof(struct fsp_s_config, e_mmc_enabled), 1468 .propname = "fsps,emmc-enabled", 1469 }, { 1470 .type = FSP_UINT8, 1471 .offset = offsetof(struct fsp_s_config, e_mmc_host_max_speed), 1472 .propname = "fsps,emmc-host-max-speed", 1473 }, { 1474 .type = FSP_UINT8, 1475 .offset = offsetof(struct fsp_s_config, ufs_enabled), 1476 .propname = "fsps,ufs-enabled", 1477 }, { 1478 .type = FSP_UINT8, 1479 .offset = offsetof(struct fsp_s_config, sdio_enabled), 1480 .propname = "fsps,sdio-enabled", 1481 }, { 1482 .type = FSP_UINT8, 1483 .offset = offsetof(struct fsp_s_config, gpp_lock), 1484 .propname = "fsps,gpp-lock", 1485 }, { 1486 .type = FSP_UINT8, 1487 .offset = offsetof(struct fsp_s_config, sirq_enable), 1488 .propname = "fsps,sirq-enable", 1489 }, { 1490 .type = FSP_UINT8, 1491 .offset = offsetof(struct fsp_s_config, sirq_mode), 1492 .propname = "fsps,sirq-mode", 1493 }, { 1494 .type = FSP_UINT8, 1495 .offset = offsetof(struct fsp_s_config, start_frame_pulse), 1496 .propname = "fsps,start-frame-pulse", 1497 }, { 1498 .type = FSP_UINT8, 1499 .offset = offsetof(struct fsp_s_config, smbus_enable), 1500 .propname = "fsps,smbus-enable", 1501 }, { 1502 .type = FSP_UINT8, 1503 .offset = offsetof(struct fsp_s_config, arp_enable), 1504 .propname = "fsps,arp-enable", 1505 }, { 1506 .type = FSP_UINT16, 1507 .offset = offsetof(struct fsp_s_config, num_rsvd_smbus_addresses), 1508 .propname = "fsps,num-rsvd-smbus-addresses", 1509 }, { 1510 .type = FSP_UINT8, 1511 .offset = offsetof(struct fsp_s_config, rsvd_smbus_address_table), 1512 .propname = "fsps,rsvd-smbus-address-table", 1513 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1514 rsvd_smbus_address_table), 1515 }, { 1516 .type = FSP_UINT8, 1517 .offset = offsetof(struct fsp_s_config, disable_compliance_mode), 1518 .propname = "fsps,disable-compliance-mode", 1519 }, { 1520 .type = FSP_UINT8, 1521 .offset = offsetof(struct fsp_s_config, usb_per_port_ctl), 1522 .propname = "fsps,usb-per-port-ctl", 1523 }, { 1524 .type = FSP_UINT8, 1525 .offset = offsetof(struct fsp_s_config, usb30_mode), 1526 .propname = "fsps,usb30-mode", 1527 }, { 1528 .type = FSP_UINT8, 1529 .offset = offsetof(struct fsp_s_config, port_usb20_enable), 1530 .propname = "fsps,port-usb20-enable", 1531 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb20_enable), 1532 }, { 1533 .type = FSP_UINT8, 1534 .offset = offsetof(struct fsp_s_config, port_us20b_over_current_pin), 1535 .propname = "fsps,port-us20b-over-current-pin", 1536 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1537 port_us20b_over_current_pin), 1538 }, { 1539 .type = FSP_UINT8, 1540 .offset = offsetof(struct fsp_s_config, usb_otg), 1541 .propname = "fsps,usb-otg", 1542 }, { 1543 .type = FSP_UINT8, 1544 .offset = offsetof(struct fsp_s_config, hsic_support_enable), 1545 .propname = "fsps,hsic-support-enable", 1546 }, { 1547 .type = FSP_UINT8, 1548 .offset = offsetof(struct fsp_s_config, port_usb30_enable), 1549 .propname = "fsps,port-usb30-enable", 1550 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb30_enable), 1551 }, { 1552 .type = FSP_UINT8, 1553 .offset = offsetof(struct fsp_s_config, port_us30b_over_current_pin), 1554 .propname = "fsps,port-us30b-over-current-pin", 1555 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1556 port_us30b_over_current_pin), 1557 }, { 1558 .type = FSP_UINT8, 1559 .offset = offsetof(struct fsp_s_config, ssic_port_enable), 1560 .propname = "fsps,ssic-port-enable", 1561 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_port_enable), 1562 }, { 1563 .type = FSP_UINT16, 1564 .offset = offsetof(struct fsp_s_config, dlane_pwr_gating), 1565 .propname = "fsps,dlane-pwr-gating", 1566 }, { 1567 .type = FSP_UINT8, 1568 .offset = offsetof(struct fsp_s_config, vtd_enable), 1569 .propname = "fsps,vtd-enable", 1570 }, { 1571 .type = FSP_UINT8, 1572 .offset = offsetof(struct fsp_s_config, lock_down_global_smi), 1573 .propname = "fsps,lock-down-global-smi", 1574 }, { 1575 .type = FSP_UINT16, 1576 .offset = offsetof(struct fsp_s_config, reset_wait_timer), 1577 .propname = "fsps,reset-wait-timer", 1578 }, { 1579 .type = FSP_UINT8, 1580 .offset = offsetof(struct fsp_s_config, rtc_lock), 1581 .propname = "fsps,rtc-lock", 1582 }, { 1583 .type = FSP_UINT8, 1584 .offset = offsetof(struct fsp_s_config, sata_test_mode), 1585 .propname = "fsps,sata-test-mode", 1586 }, { 1587 .type = FSP_UINT8, 1588 .offset = offsetof(struct fsp_s_config, ssic_rate), 1589 .propname = "fsps,ssic-rate", 1590 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_rate), 1591 }, { 1592 .type = FSP_UINT16, 1593 .offset = offsetof(struct fsp_s_config, dynamic_power_gating), 1594 .propname = "fsps,dynamic-power-gating", 1595 }, { 1596 .type = FSP_UINT16, 1597 .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_max_snoop_latency), 1598 .propname = "fsps,pcie-rp-ltr-max-snoop-latency", 1599 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1600 pcie_rp_ltr_max_snoop_latency), 1601 }, { 1602 .type = FSP_UINT8, 1603 .offset = offsetof(struct fsp_s_config, 1604 pcie_rp_snoop_latency_override_mode), 1605 .propname = "fsps,pcie-rp-snoop-latency-override-mode", 1606 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1607 pcie_rp_snoop_latency_override_mode), 1608 }, { 1609 .type = FSP_UINT16, 1610 .offset = offsetof(struct fsp_s_config, 1611 pcie_rp_snoop_latency_override_value), 1612 .propname = "fsps,pcie-rp-snoop-latency-override-value", 1613 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1614 pcie_rp_snoop_latency_override_value), 1615 }, { 1616 .type = FSP_UINT8, 1617 .offset = offsetof(struct fsp_s_config, 1618 pcie_rp_snoop_latency_override_multiplier), 1619 .propname = "fsps,pcie-rp-snoop-latency-override-multiplier", 1620 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1621 pcie_rp_snoop_latency_override_multiplier), 1622 }, { 1623 .type = FSP_UINT8, 1624 .offset = offsetof(struct fsp_s_config, skip_mp_init), 1625 .propname = "fsps,skip-mp-init", 1626 }, { 1627 .type = FSP_UINT8, 1628 .offset = offsetof(struct fsp_s_config, dci_auto_detect), 1629 .propname = "fsps,dci-auto-detect", 1630 }, { 1631 .type = FSP_UINT16, 1632 .offset = offsetof(struct fsp_s_config, 1633 pcie_rp_ltr_max_non_snoop_latency), 1634 .propname = "fsps,pcie-rp-ltr-max-non-snoop-latency", 1635 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1636 pcie_rp_ltr_max_non_snoop_latency), 1637 }, { 1638 .type = FSP_UINT8, 1639 .offset = offsetof(struct fsp_s_config, 1640 pcie_rp_non_snoop_latency_override_mode), 1641 .propname = "fsps,pcie-rp-non-snoop-latency-override-mode", 1642 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1643 pcie_rp_non_snoop_latency_override_mode), 1644 }, { 1645 .type = FSP_UINT8, 1646 .offset = offsetof(struct fsp_s_config, tco_timer_halt_lock), 1647 .propname = "fsps,tco-timer-halt-lock", 1648 }, { 1649 .type = FSP_UINT8, 1650 .offset = offsetof(struct fsp_s_config, pwr_btn_override_period), 1651 .propname = "fsps,pwr-btn-override-period", 1652 }, { 1653 .type = FSP_UINT16, 1654 .offset = offsetof(struct fsp_s_config, 1655 pcie_rp_non_snoop_latency_override_value), 1656 .propname = "fsps,pcie-rp-non-snoop-latency-override-value", 1657 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1658 pcie_rp_non_snoop_latency_override_value), 1659 }, { 1660 .type = FSP_UINT8, 1661 .offset = offsetof(struct fsp_s_config, 1662 pcie_rp_non_snoop_latency_override_multiplier), 1663 .propname = "fsps,pcie-rp-non-snoop-latency-override-multiplier", 1664 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1665 pcie_rp_non_snoop_latency_override_multiplier), 1666 }, { 1667 .type = FSP_UINT8, 1668 .offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_scale), 1669 .propname = "fsps,pcie-rp-slot-power-limit-scale", 1670 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1671 pcie_rp_slot_power_limit_scale), 1672 }, { 1673 .type = FSP_UINT8, 1674 .offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_value), 1675 .propname = "fsps,pcie-rp-slot-power-limit-value", 1676 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1677 pcie_rp_slot_power_limit_value), 1678 }, { 1679 .type = FSP_UINT8, 1680 .offset = offsetof(struct fsp_s_config, disable_native_power_button), 1681 .propname = "fsps,disable-native-power-button", 1682 }, { 1683 .type = FSP_UINT8, 1684 .offset = offsetof(struct fsp_s_config, power_butter_debounce_mode), 1685 .propname = "fsps,power-butter-debounce-mode", 1686 }, { 1687 .type = FSP_UINT32, 1688 .offset = offsetof(struct fsp_s_config, sdio_tx_cmd_cntl), 1689 .propname = "fsps,sdio-tx-cmd-cntl", 1690 }, { 1691 .type = FSP_UINT32, 1692 .offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl1), 1693 .propname = "fsps,sdio-tx-data-cntl1", 1694 }, { 1695 .type = FSP_UINT32, 1696 .offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl2), 1697 .propname = "fsps,sdio-tx-data-cntl2", 1698 }, { 1699 .type = FSP_UINT32, 1700 .offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl1), 1701 .propname = "fsps,sdio-rx-cmd-data-cntl1", 1702 }, { 1703 .type = FSP_UINT32, 1704 .offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl2), 1705 .propname = "fsps,sdio-rx-cmd-data-cntl2", 1706 }, { 1707 .type = FSP_UINT32, 1708 .offset = offsetof(struct fsp_s_config, sdcard_tx_cmd_cntl), 1709 .propname = "fsps,sdcard-tx-cmd-cntl", 1710 }, { 1711 .type = FSP_UINT32, 1712 .offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl1), 1713 .propname = "fsps,sdcard-tx-data-cntl1", 1714 }, { 1715 .type = FSP_UINT32, 1716 .offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl2), 1717 .propname = "fsps,sdcard-tx-data-cntl2", 1718 }, { 1719 .type = FSP_UINT32, 1720 .offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl1), 1721 .propname = "fsps,sdcard-rx-cmd-data-cntl1", 1722 }, { 1723 .type = FSP_UINT32, 1724 .offset = offsetof(struct fsp_s_config, sdcard_rx_strobe_cntl), 1725 .propname = "fsps,sdcard-rx-strobe-cntl", 1726 }, { 1727 .type = FSP_UINT32, 1728 .offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl2), 1729 .propname = "fsps,sdcard-rx-cmd-data-cntl2", 1730 }, { 1731 .type = FSP_UINT32, 1732 .offset = offsetof(struct fsp_s_config, emmc_tx_cmd_cntl), 1733 .propname = "fsps,emmc-tx-cmd-cntl", 1734 }, { 1735 .type = FSP_UINT32, 1736 .offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl1), 1737 .propname = "fsps,emmc-tx-data-cntl1", 1738 }, { 1739 .type = FSP_UINT32, 1740 .offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl2), 1741 .propname = "fsps,emmc-tx-data-cntl2", 1742 }, { 1743 .type = FSP_UINT32, 1744 .offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl1), 1745 .propname = "fsps,emmc-rx-cmd-data-cntl1", 1746 }, { 1747 .type = FSP_UINT32, 1748 .offset = offsetof(struct fsp_s_config, emmc_rx_strobe_cntl), 1749 .propname = "fsps,emmc-rx-strobe-cntl", 1750 }, { 1751 .type = FSP_UINT32, 1752 .offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl2), 1753 .propname = "fsps,emmc-rx-cmd-data-cntl2", 1754 }, { 1755 .type = FSP_UINT32, 1756 .offset = offsetof(struct fsp_s_config, emmc_master_sw_cntl), 1757 .propname = "fsps,emmc-master-sw-cntl", 1758 }, { 1759 .type = FSP_UINT8, 1760 .offset = offsetof(struct fsp_s_config, pcie_rp_selectable_deemphasis), 1761 .propname = "fsps,pcie-rp-selectable-deemphasis", 1762 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1763 pcie_rp_selectable_deemphasis), 1764 }, { 1765 .type = FSP_UINT8, 1766 .offset = offsetof(struct fsp_s_config, monitor_mwait_enable), 1767 .propname = "fsps,monitor-mwait-enable", 1768 }, { 1769 .type = FSP_UINT8, 1770 .offset = offsetof(struct fsp_s_config, hd_audio_dsp_uaa_compliance), 1771 .propname = "fsps,hd-audio-dsp-uaa-compliance", 1772 }, { 1773 .type = FSP_UINT32, 1774 .offset = offsetof(struct fsp_s_config, ipc), 1775 .propname = "fsps,ipc", 1776 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ipc), 1777 }, { 1778 .type = FSP_UINT8, 1779 .offset = offsetof(struct fsp_s_config, sata_ports_disable_dynamic_pg), 1780 .propname = "fsps,sata-ports-disable-dynamic-pg", 1781 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1782 sata_ports_disable_dynamic_pg), 1783 }, { 1784 .type = FSP_UINT8, 1785 .offset = offsetof(struct fsp_s_config, init_s3_cpu), 1786 .propname = "fsps,init-s3-cpu", 1787 }, { 1788 .type = FSP_UINT8, 1789 .offset = offsetof(struct fsp_s_config, skip_punit_init), 1790 .propname = "fsps,skip-punit-init", 1791 }, { 1792 .type = FSP_UINT8, 1793 .offset = offsetof(struct fsp_s_config, port_usb20_per_port_tx_pe_half), 1794 .propname = "fsps,port-usb20-per-port-tx-pe-half", 1795 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1796 port_usb20_per_port_tx_pe_half), 1797 }, { 1798 .type = FSP_UINT8, 1799 .offset = offsetof(struct fsp_s_config, port_usb20_per_port_pe_txi_set), 1800 .propname = "fsps,port-usb20-per-port-pe-txi-set", 1801 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1802 port_usb20_per_port_pe_txi_set), 1803 }, { 1804 .type = FSP_UINT8, 1805 .offset = offsetof(struct fsp_s_config, port_usb20_per_port_txi_set), 1806 .propname = "fsps,port-usb20-per-port-txi-set", 1807 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1808 port_usb20_per_port_txi_set), 1809 }, { 1810 .type = FSP_UINT8, 1811 .offset = offsetof(struct fsp_s_config, port_usb20_hs_skew_sel), 1812 .propname = "fsps,port-usb20-hs-skew-sel", 1813 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1814 port_usb20_hs_skew_sel), 1815 }, { 1816 .type = FSP_UINT8, 1817 .offset = offsetof(struct fsp_s_config, 1818 port_usb20_i_usb_tx_emphasis_en), 1819 .propname = "fsps,port-usb20-i-usb-tx-emphasis-en", 1820 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1821 port_usb20_i_usb_tx_emphasis_en), 1822 }, { 1823 .type = FSP_UINT8, 1824 .offset = offsetof(struct fsp_s_config, 1825 port_usb20_per_port_rxi_set), 1826 .propname = "fsps,port-usb20-per-port-rxi-set", 1827 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1828 port_usb20_per_port_rxi_set), 1829 }, { 1830 .type = FSP_UINT8, 1831 .offset = offsetof(struct fsp_s_config, port_usb20_hs_npre_drv_sel), 1832 .propname = "fsps,port-usb20-hs-npre-drv-sel", 1833 .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, 1834 port_usb20_hs_npre_drv_sel), 1835 }, { 1836 .type = FSP_UINT8, 1837 .offset = offsetof(struct fsp_s_config, os_selection), 1838 .propname = "fsps,os-selection", 1839 }, { 1840 .type = FSP_UINT8, 1841 .offset = offsetof(struct fsp_s_config, dptf_enabled), 1842 .propname = "fsps,dptf-enabled", 1843 }, { 1844 .type = FSP_UINT8, 1845 .offset = offsetof(struct fsp_s_config, pwm_enabled), 1846 .propname = "fsps,pwm-enabled", 1847 }, { 1848 .propname = NULL 1849 } 1850}; 1851 1852int fsp_s_update_config_from_dtb(ofnode node, struct fsp_s_config *cfg) 1853{ 1854 return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_s_bindings); 1855} 1856#endif 1857