Searched refs:odiv (Results 1 - 6 of 6) sorted by relevance

/u-boot/drivers/clk/imx/
H A Dclk-fracn-gppll.c61 .odiv = (_odiv), \
71 .odiv = (_odiv), \
84 * Fout = Fvco / odiv
107 * Fout = Fvco / odiv
157 u32 mfi, mfn, mfd, rdiv, odiv; local
172 odiv = FIELD_GET(PLL_ODIV_MASK, pll_div);
183 rate_table[i].odiv == odiv)
193 switch (odiv) {
195 odiv
[all...]
H A Dclk.h59 unsigned int odiv; member in struct:imx_fracn_gppll_rate_table
/u-boot/drivers/clk/
H A Dclk_pic32.c99 u32 iclk, idiv, odiv, mult; local
105 odiv = ((v >> 24) & PLLODIV_MASK);
110 if (odiv < 2)
111 odiv = 2;
112 else if (odiv < 5)
113 odiv = (1 << odiv);
115 odiv = 32;
117 return ((plliclk / idiv) * mult) / odiv;
H A Dclk-hsdk-cgu.c198 const u8 odiv; member in struct:hsdk_pll_cfg
406 val |= (u32)cfg->odiv << CGU_PLL_CTRL_ODIV_SHIFT;
428 u32 idiv, fbdiv, odiv; local
448 /* output divider = 2^(reg.odiv) */
449 odiv = 1 << ((val & CGU_PLL_CTRL_ODIV_MASK) >> CGU_PLL_CTRL_ODIV_SHIFT);
452 do_div(rate, idiv * odiv);
/u-boot/arch/arm/include/asm/arch-imx9/
H A Dclock.h173 int odiv; member in struct:imx_intpll_rate_table
180 int odiv; member in struct:imx_fracpll_rate_table
190 .odiv = (_o), \
198 .odiv = (_o), \
/u-boot/arch/arm/mach-imx/imx9/
H A Dclock.c98 div &= 0xff; /* odiv */
220 writel((rate->odiv & GENMASK(7, 0)) | ((rate->rdiv << 13) & GENMASK(15, 13)) |
286 writel((rate->odiv & GENMASK(7, 0)) | ((rate->rdiv << 13) & GENMASK(15, 13)) |

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