Searched refs:mhz (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/xtensa/cpu/
H A Dcpu.c32 char buf[120], mhz[8]; local
40 XCHAL_CORE_ID, id0, id1, strmhz(mhz, gd->cpu_clk));
/u-boot/arch/xtensa/lib/
H A Dtime.c55 ulong mhz = get_board_sys_clk() / 1000000; local
62 delay_cycles(mhz << 22);
63 delay_cycles(mhz * lo);
/u-boot/drivers/mmc/
H A Dzynq_sdhci.c1001 unsigned long clock, mhz; local
1051 mhz = DIV64_U64_ROUND_UP(clock, 1000000);
1053 if (mhz > 100 && mhz <= 200)
1054 mhz = 200;
1055 else if (mhz > 50 && mhz <= 100)
1056 mhz = 100;
1057 else if (mhz > 25 && mhz <
[all...]
/u-boot/arch/arc/lib/
H A Dcpu.c216 char mhz[8]; local
219 strmhz(mhz, gd->cpu_clk));
/u-boot/drivers/ram/rockchip/
H A Dsdram_px30.c157 u32 mhz = hz / MHz; local
160 if (mhz <= 300) {
163 } else if (mhz <= 400) {
166 } else if (mhz <= 600) {
169 } else if (mhz <= 800) {
172 } else if (mhz <= 1600) {
179 fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
H A Dsdram_rk3328.c80 u32 mhz = hz / MHZ; local
83 if (mhz <= 300) {
86 } else if (mhz <= 400) {
89 } else if (mhz <= 600) {
92 } else if (mhz <= 800) {
95 } else if (mhz <= 1600) {
102 fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
H A Dsdram_rv1126.c303 u32 mhz = hz / MHz; local
314 if (mhz <= 100) {
317 } else if (mhz <= 150) {
320 } else if (mhz <= 200) {
323 } else if (mhz <= 300) {
326 } else if (mhz <= 400) {
333 fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
1664 u32 mhz)
1781 u32 mhz, u32 dst_fsp)
1791 if (dramtype == LPDDR3 && mhz <
1663 data_training_rd(struct dram_info *dram, u32 cs, u32 dramtype, u32 mhz) argument
1780 data_training_wr(struct dram_info *dram, u32 cs, u32 dramtype, u32 mhz, u32 dst_fsp) argument
[all...]
H A Dsdram_rk3399.c108 u32 mhz; member in struct:io_setting
204 if (io->mhz >= params->base.ddr_freq &&
208 if (io->mhz >= params->base.ddr_freq)
/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c1108 mhz = 1000 * 1000, min_vco = 500 * mhz, max_vco = 1000 * mhz, local
1109 min_cf = 1 * mhz, max_cf = 6 * mhz;
/u-boot/arch/mips/mach-octeon/
H A Docteon_qlm.c63 int mhz = ref_clock / 1000000; local
66 return ((mhz >= reference_mhz - range) && (mhz <= reference_mhz + range));

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