| /u-boot/drivers/mmc/ |
| H A D | snps_dw_mmc.c | 32 u32 f_max; member in struct:snps_dwmci_priv_data
103 * If max-frequency is unset don't set priv->f_max - we will use
106 ret = dev_read_u32(dev, "max-frequency", &priv->f_max);
107 if (!ret && priv->f_max < CLOCK_MIN)
147 if (!priv->f_max)
150 clock_max = min_t(unsigned int, host->bus_hz, priv->f_max);
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| H A D | piton_mmc.c | 81 cfg->f_max = PITON_MMC_DUMMY_F_MAX;
140 cfg->f_max = PITON_MMC_DUMMY_F_MAX;
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| H A D | sdhci.c | 868 u32 f_max, u32 f_min)
960 if (f_max && (f_max < host->max_clk))
961 cfg->f_max = f_max;
963 cfg->f_max = host->max_clk;
968 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
970 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
1040 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min) argument
1044 ret = sdhci_setup_cfg(&host->cfg, host, f_max, f_mi
867 sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, u32 f_max, u32 f_min) argument
[all...] |
| H A D | davinci_mmc.c | 55 if (clock > mmc->cfg->f_max)
56 clock = mmc->cfg->f_max;
465 host->cfg.f_max = 25000000;
511 cfg->f_max = 25000000;
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| H A D | mmc_legacy.c | 175 cfg->f_max == 0 || cfg->b_max == 0)
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| H A D | omap_hsmmc.c | 1539 int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, argument
1598 if (f_max != 0)
1599 cfg->f_max = f_max;
1603 cfg->f_max = 52000000;
1605 cfg->f_max = 26000000;
1607 cfg->f_max = 20000000;
1923 if (!cfg->f_max)
1924 cfg->f_max = 52000000;
1941 cfg->f_max
[all...] |
| H A D | arm_pl180_mmci.c | 304 if (dev->clock >= dev->cfg->f_max) {
306 dev->clock = dev->cfg->f_max;
411 cfg->f_max = MMC_CLOCK_MAX;
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| H A D | jz_mmc.c | 404 .f_max = 48000000,
467 cfg->f_max = 52000000;
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| H A D | sandbox_mmc.c | 219 cfg->f_max = 52000000;
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| H A D | gen_atmel_mci.c | 505 cfg->f_max = get_mci_clk_rate() / (2*1);
551 cfg->f_max = priv->bus_clk_rate / 2;
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| H A D | mxsmmc.c | 204 priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id)
628 plat->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + priv->clkid) * 1000 / 2;
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| H A D | rockchip_sdhci.c | 578 host->max_clk = cfg->f_max;
605 ret = sdhci_setup_cfg(cfg, host, cfg->f_max, EMMC_MIN_FREQ);
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| H A D | sunxi_mmc.c | 545 cfg->f_max = 52000000;
652 cfg->f_max = 52000000;
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| H A D | sh_mmcif.c | 630 sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
728 plat->cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
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| H A D | meson_gx_mmc.c | 282 cfg->f_max = 100000000; /* 100 MHz */
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| H A D | ftsdc010_mci.c | 377 cfg->f_max = max_clk;
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| H A D | mmc-uclass.c | 234 /* f_max is obtained from the optional "max-frequency" property */
235 dev_read_u32(dev, "max-frequency", &cfg->f_max);
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| H A D | mmc_spi.c | 471 plat->cfg.f_max = priv->spi->max_hz;
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| H A D | mxcmmc.c | 512 mxcmci_cfg.f_max = mxc_get_clock(MXC_ESDHC_CLK) >> 1;
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| H A D | mvebu_mmc.c | 454 cfg->f_max = MVEBU_MMC_CLOCKRATE_MAX;
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| H A D | owl_mmc.c | 353 cfg->f_max = 52000000;
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| /u-boot/include/ |
| H A D | sdhci.h | 479 * @f_max: Maximum supported clock frequency in HZ (0 for default)
483 u32 f_max, u32 f_min);
509 * @f_max: Maximum supported clock frequency in HZ (0 for default)
513 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
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| /u-boot/arch/arm/include/asm/ |
| H A D | omap_mmc.h | 235 int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
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| /u-boot/board/davinci/da8xxevm/ |
| H A D | omapl138_lcdk.c | 333 .f_max = 25000000,
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| /u-boot/board/ti/am335x/ |
| H A D | board.c | 990 .cfg.f_max = 52000000,
1004 .cfg.f_max = 52000000,
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