Searched refs:dq_dly (Results 1 - 4 of 4) sorted by relevance
| /u-boot/arch/mips/mach-mtmips/ |
| H A D | ddr_init.c | 69 u32 dq_dly, u32 dqs_dly, mc_reset_t mc_reset, u32 bw)
82 writel(dq_dly, memc + MEMCTL_DDR_DQ_DLY_REG);
107 mc_ddr_init(param->memc, ¶m->cfgs[DRAM_8MB], param->dq_dly,
118 mc_ddr_init(param->memc, ¶m->cfgs[DRAM_128MB], param->dq_dly,
138 mc_ddr_init(param->memc, ¶m->cfgs[sz], param->dq_dly,
152 mc_ddr_init(param->memc, ¶m->cfgs[DRAM_32MB], param->dq_dly,
163 mc_ddr_init(param->memc, ¶m->cfgs[DRAM_256MB], param->dq_dly,
195 mc_ddr_init(param->memc, ¶m->cfgs[sz], param->dq_dly,
68 mc_ddr_init(void __iomem *memc, const struct mc_ddr_cfg *cfg, u32 dq_dly, u32 dqs_dly, mc_reset_t mc_reset, u32 bw) argument
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| /u-boot/arch/mips/mach-mtmips/include/mach/ |
| H A D | ddr.h | 41 u32 dq_dly; member in struct:mc_ddr_init_param
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| /u-boot/arch/mips/mach-mtmips/mt7620/ |
| H A D | dram.c | 87 param.dq_dly = DDR2_DQ_DLY;
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| /u-boot/arch/mips/mach-mtmips/mt7628/ |
| H A D | ddr.c | 151 param.dq_dly = DDR2_DQ_DLY;
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