Searched refs:dpll_params (Results 1 - 25 of 26) sorted by relevance

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/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dclock.h89 struct dpll_params { struct
116 extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS];
117 extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ];
118 extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ];
119 extern const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ];
120 extern const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ];
121 extern const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ];
125 const struct dpll_params *get_dpll_mpu_params(void);
126 const struct dpll_params *get_dpll_core_params(void);
127 const struct dpll_params *get_dpll_per_param
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H A Dclocks_am33xx.h32 extern const struct dpll_params dpll_core_opp100;
33 extern struct dpll_params dpll_mpu_opp100;
/u-boot/board/compulab/cm_t43/
H A Dspl.c18 const struct dpll_params dpll_mpu = { 800, 24, 1, -1, -1, -1, -1 };
19 const struct dpll_params dpll_core = { 1000, 24, -1, -1, 10, 8, 4 };
20 const struct dpll_params dpll_per = { 960, 24, 5, -1, -1, -1, -1 };
21 const struct dpll_params dpll_ddr = { 400, 23, 1, -1, 1, -1, -1 };
86 const struct dpll_params *get_dpll_ddr_params(void)
91 const struct dpll_params *get_dpll_mpu_params(void)
96 const struct dpll_params *get_dpll_core_params(void)
101 const struct dpll_params *get_dpll_per_params(void)
/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c61 struct dpll_params dpll_mpu_opp100 = {
63 const struct dpll_params dpll_core_opp100 = {
66 const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
101 const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ] = {
108 const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ] = {
115 const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ] = {
122 const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ] = {
129 const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ] = {
136 __weak const struct dpll_params *get_dpll_mpu_params(void)
141 const struct dpll_params *get_dpll_core_param
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H A Dclock.c21 const struct dpll_params *params)
76 const struct dpll_params *params)
105 const struct dpll_params *params;
254 const struct dpll_params *params;
H A Dchilisom.c161 const struct dpll_params dpll_ddr_chilisom = {
164 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c39 static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {
54 static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {
68 static const struct dpll_params mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {
80 static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {
91 static const struct dpll_params core_dpll_params_es1_1524mhz[NUM_SYS_CLKS] = {
102 static const struct dpll_params
113 static const struct dpll_params per_dpll_params_1536mhz[NUM_SYS_CLKS] = {
123 static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
135 static const struct dpll_params
147 static const struct dpll_params abe_dpll_params_32k_196608kh
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/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c31 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
42 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
52 static const struct dpll_params
63 static const struct dpll_params
74 static const struct dpll_params
85 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {
95 static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
105 static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
115 static const struct dpll_params per_dpll_params_768mhz_dra76x[NUM_SYS_CLKS] = {
125 static const struct dpll_params iva_dpll_params_2330mh
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/u-boot/drivers/usb/dwc3/
H A Dti_usb_phy.c152 struct usb3_dpll_params *dpll_params; local
157 dpll_params = ti_usb3_get_dpll_params(phy);
158 if (!dpll_params)
163 val |= dpll_params->n << PLL_REGN_SHIFT;
168 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
173 val |= dpll_params->m << PLL_REGM_SHIFT;
178 val |= dpll_params->mf << PLL_REGM_F_SHIFT;
183 val |= dpll_params->sd << PLL_SD_SHIFT;
/u-boot/board/eets/pdu001/
H A Dboard.c188 const struct dpll_params dpll_ddr = {
190 const struct dpll_params dpll_ddr_evm_sk = {
192 const struct dpll_params dpll_ddr_bone_black = {
212 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/phytec/phycore_am335x_r2/
H A Dboard.c41 const struct dpll_params dpll_ddr = {
44 const struct dpll_params *get_dpll_ddr_params(void)
193 const struct dpll_params *get_dpll_mpu_params(void)
/u-boot/board/BuR/brsmarc1/
H A Dboard.c74 const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};
116 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/BuR/brxre1/
H A Dboard.c81 const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};
126 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/BuR/brppt1/
H A Dboard.c80 static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
133 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/ti/am43xx/
H A Dboard.c59 const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
94 const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = {
101 const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = {
108 const struct dpll_params epos_evm_dpll_ddr[NUM_CRYSTAL_FREQ] = {
115 const struct dpll_params gp_evm_dpll_ddr = {
118 static const struct dpll_params idk_dpll_ddr = {
325 const struct dpll_params *get_dpll_ddr_params(void)
368 const struct dpll_params *get_dpll_mpu_params(void)
376 const struct dpll_params *get_dpll_core_params(void)
383 const struct dpll_params *get_dpll_per_param
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/u-boot/arch/arm/include/asm/
H A Domap_common.h494 struct dpll_params { struct
529 const struct dpll_params *mpu;
530 const struct dpll_params *core;
531 const struct dpll_params *per;
532 const struct dpll_params *abe;
533 const struct dpll_params *iva;
534 const struct dpll_params *usb;
535 const struct dpll_params *ddr;
536 const struct dpll_params *gmac;
622 const struct dpll_params *get_mpu_dpll_param
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/u-boot/arch/arm/mach-omap2/
H A Dclocks-common.c76 void setup_post_dividers(u32 const base, const struct dpll_params *params)
151 const struct dpll_params *get_mpu_dpll_params(struct dplls const *dpll_data)
157 const struct dpll_params *get_core_dpll_params(struct dplls const *dpll_data)
163 const struct dpll_params *get_per_dpll_params(struct dplls const *dpll_data)
169 const struct dpll_params *get_iva_dpll_params(struct dplls const *dpll_data)
175 const struct dpll_params *get_usb_dpll_params(struct dplls const *dpll_data)
181 const struct dpll_params *get_abe_dpll_params(struct dplls const *dpll_data)
191 static const struct dpll_params *get_ddr_dpll_params
202 static const struct dpll_params *get_gmac_dpll_params
213 static void do_setup_dpll(u32 const base, const struct dpll_params *param
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/u-boot/board/siemens/common/
H A Dboard_am335x.c85 const struct dpll_params dpll_ddr = {
88 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/drivers/phy/
H A Dti-pipe3-phy.c224 struct pipe3_dpll_params *dpll_params; local
226 dpll_params = omap_pipe3_get_dpll_params(pipe3);
227 if (!dpll_params) {
234 val |= dpll_params->n << PLL_REGN_SHIFT;
239 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
244 val |= dpll_params->m << PLL_REGM_SHIFT;
249 val |= dpll_params->mf << PLL_REGM_F_SHIFT;
254 val |= dpll_params->sd << PLL_SD_SHIFT;
/u-boot/board/bosch/guardian/
H A Dboard.c75 const struct dpll_params dpll_ddr = {
143 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/vscom/baltos/
H A Dboard.c173 const struct dpll_params dpll_ddr = {
175 const struct dpll_params dpll_ddr_evm_sk = {
177 const struct dpll_params dpll_ddr_baltos = {
219 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/bosch/shc/
H A Dboard.c291 const struct dpll_params dpll_ddr_shc = {
294 const struct dpll_params *get_dpll_ddr_params(void)
310 const struct dpll_params dpll_mpu_shc_opp100 = {
/u-boot/board/tcl/sl50/
H A Dboard.c92 const struct dpll_params dpll_ddr_sl50 = {
161 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/isee/igep003x/
H A Dboard.c146 const struct dpll_params dpll_ddr = {
149 const struct dpll_params *get_dpll_ddr_params(void)
/u-boot/board/siemens/pxm2/
H A Dboard.c121 const struct dpll_params dpll_mpu_pxm2 = {

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