Searched refs:ddr_mode (Results 1 - 17 of 17) sorted by relevance

/u-boot/arch/arm/mach-exynos/include/mach/
H A Dspl.h42 enum ddr_mode mem_type; /* Type of on-board memory */
H A Ddmc.h431 enum ddr_mode { enum
/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c786 MV_DRAM_MODES *ddr_mode; local
790 ddr_mode = ddr3_get_static_ddr_mode();
793 while (ddr_mode->vals[j].reg_addr != 0) {
795 reg_write(ddr_mode->vals[j].reg_addr,
796 ddr_mode->vals[j].reg_value);
798 if (ddr_mode->vals[j].reg_addr ==
886 MV_DRAM_MODES *ddr_mode; local
890 ddr_mode = ddr3_get_static_ddr_mode();
892 while (ddr_mode->regs[j].reg_addr != 0) {
893 reg_write(ddr_mode
[all...]
/u-boot/arch/arm/mach-exynos/
H A Dclock_init.h40 enum ddr_mode mem_type; /* Memory type */
H A Ddmc_common.c75 void update_reset_dll(uint32_t *phycontrol0, enum ddr_mode mode)
H A Dclock_init_exynos5.c484 static void clock_get_mem_selection(enum ddr_mode *mem_type,
501 enum ddr_mode mem_type;
525 enum ddr_mode mem_type;
H A Dexynos5_setup.h939 * ddr_mode to distinguish between LPDDR2 and DDR3.
942 * @param ddr_mode Type of DDR memory
944 void update_reset_dll(uint32_t *phycontrol0, enum ddr_mode);
/u-boot/drivers/mmc/
H A Dsdhci-cadence.c151 if (mmc->ddr_mode)
156 if (mmc->ddr_mode)
H A Dxenon_sdhci.c301 if (host->mmc->ddr_mode) {
410 if (host->mmc->ddr_mode)
424 if (host->mmc->ddr_mode)
H A Dtmio-common.c550 if (mmc->ddr_mode)
574 if (mmc->ddr_mode && (divisor == 1))
660 mmc->clock, mmc->ddr_mode, mmc->bus_width);
H A Ddw_mmc.c130 timeout /= mmc->ddr_mode ? 2 : 1;
493 if (mmc->ddr_mode)
H A Dstm32_sdmmc2.c615 if (desired && (sys_clock > desired || mmc->ddr_mode ||
622 if (mmc->ddr_mode)
H A Dmmc.c195 mmc->ddr_mode = mmc_is_mode_ddr(mode);
321 if (mmc->ddr_mode)
2677 if (mmc->ddr_mode) {
2892 mmc->ddr_mode = 0;
H A Dfsl_esdhc_imx.c461 | (mmc->ddr_mode ? XFERTYP_DDREN : 0));
595 int ddr_pre_div = mmc->ddr_mode ? 2 : 1;
H A Docteontx_hsmmc.c2350 if (a->ddr_only && !mmc->ddr_mode) {
2491 if (mmc->ddr_mode && bus_width)
2505 slot->last_clock, mmc->clock, mmc->ddr_mode);
2544 !mmc->ddr_mode) {
3210 mmc->ddr_mode ? "yes" : "no",
/u-boot/include/
H A Dmmc.h721 int ddr_mode; member in struct:mmc
/u-boot/cmd/
H A Dmmc.c59 mmc->ddr_mode ? " DDR" : "");

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