Searched refs:clkr (Results 1 - 2 of 2) sorted by relevance
| /u-boot/drivers/ram/octeon/ | ||
| H A D | octeon_ddr.c | 419 u64 clkf, clkr, max_clkf = 127; local 722 for (clkr = 0; clkr < 4; ++clkr) { 729 (clkr + 1) * (_en[save_en_idx])); 734 (clkf + 1) / (clkr + 1) / 1000000; 738 1) / ((clkr + 756 debug("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld\n", 757 clkr, save_en_idx, 768 best_clkr = clkr; [all...] |
| /u-boot/arch/mips/mach-octeon/include/mach/ | ||
| H A D | cvmx-lmcx-defs.h | 1219 uint64_t clkr:2; member in struct:cvmx_lmcx_ddr_pll_ctl::cvmx_lmcx_ddr_pll_ctl_cn70xx 1238 uint64_t clkr:2; member in struct:cvmx_lmcx_ddr_pll_ctl::cvmx_lmcx_ddr_pll_ctl_cn73xx 3092 uint64_t clkr:6; member in struct:cvmx_lmcx_pll_ctl::cvmx_lmcx_pll_ctl_s 3107 uint64_t clkr:6; member in struct:cvmx_lmcx_pll_ctl::cvmx_lmcx_pll_ctl_cn50xx 3124 uint64_t clkr:6; member in struct:cvmx_lmcx_pll_ctl::cvmx_lmcx_pll_ctl_cn56xxp1 |
Completed in 124 milliseconds