Lines Matching refs:clkr
419 u64 clkf, clkr, max_clkf = 127;
722 for (clkr = 0; clkr < 4; ++clkr) {
729 (clkr + 1) * (_en[save_en_idx]));
734 (clkf + 1) / (clkr + 1) / 1000000;
738 1) / ((clkr +
756 debug("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld\n",
757 clkr, save_en_idx,
768 best_clkr = clkr;
808 debug("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld <==\n",
850 ddr_pll_ctl.cn78xx.clkr = best_clkr;