Searched refs:additive_latency (Results 1 - 5 of 5) sorted by relevance
/u-boot/include/ |
H A D | common_timing_params.h | 55 unsigned int additive_latency; member in struct:__anon1110
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/u-boot/drivers/ddr/fsl/ |
H A D | lc_common_dimm_params.c | 265 unsigned int additive_latency = 0; local 533 additive_latency = 0; 539 additive_latency = picos_to_mclk(ctrl_num, trcd_ps) - 541 if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { 542 additive_latency = picos_to_mclk(ctrl_num, trcd_ps); 543 debug("setting additive_latency to %u because it was " 544 " greater than tRCD_ps\n", additive_latency); 554 if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { 572 outpdimm->additive_latency = additive_latency; [all...] |
H A D | ctrl_regs.c | 460 unsigned int additive_latency) 483 ext_add_lat = additive_latency >> 4; 640 unsigned int additive_latency) 661 add_lat_mclk = additive_latency; 1354 unsigned int additive_latency, 1394 if (additive_latency == (cas_latency - 1)) 1396 if (additive_latency == (cas_latency - 2)) 1525 unsigned int additive_latency, 1565 if (additive_latency == (cas_latency - 1)) 1567 if (additive_latency 455 set_timing_cfg_3(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency) argument 635 set_timing_cfg_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency) argument 1349 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 1520 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 1716 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 2334 unsigned int additive_latency; local [all...] |
H A D | interactive.c | 197 COMMON_TIMING(additive_latency), 471 COMMON_TIMING(additive_latency),
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/u-boot/drivers/ram/ |
H A D | mpc83xx_sdram.c | 334 u32 additive_latency, mcas_to_preamble_override, write_latency, local 692 additive_latency = dev_read_u32_default(dev, "additive_latency", 0); 693 if (additive_latency > 5) { 694 debug("%s: additive_latency value %d invalid.\n", 695 dev->name, additive_latency); 776 timing_cfg_2 = additive_latency << TIMING_CFG2_ADD_LAT_SHIFT |
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