Searched refs:SUNXI_PIO_BASE (Results 1 - 4 of 4) sorted by relevance

/u-boot/include/
H A Dsunxi_gpio.h17 #define SUNXI_PIO_BASE 0x06000800 macro
20 #define SUNXI_PIO_BASE 0x0300b000 macro
23 #define SUNXI_PIO_BASE 0x02000000 macro
26 #define SUNXI_PIO_BASE 0x01c20800 macro
/u-boot/arch/arm/mach-sunxi/
H A Ddram_suniv.c357 setbits_le32(SUNXI_PIO_BASE + 0x2c4, (0x1 << 23) | (0x20 << 17));
360 writel(0xaaa, SUNXI_PIO_BASE + 0x2c0);
362 writel(0xfff, SUNXI_PIO_BASE + 0x2c0);
393 clrsetbits_le32(SUNXI_PIO_BASE + 0x2c4, (1 << 16),
406 clrsetbits_le32(SUNXI_PIO_BASE + 0x2c4, (1 << 16),
H A Dboard.c192 val = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL);
193 writel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL);
/u-boot/drivers/gpio/
H A Dsunxi_gpio.c68 pio_base = (void *)(uintptr_t)SUNXI_PIO_BASE;

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