#
02780a1c |
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07-Dec-2023 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move #ifdef guards around tzpc_init() to header file Some later 32-bit SoCs require some setup of the Secure Peripherals Controller, which is handled in tzpc_init(). At the moment this is guarded in board.c by some #ifdefs selecting the SoCs that need it. Move those #ifdef guards into the header file, providing an empty stub function for all other SoCs, so that the #ifdefs can be removed from the .c file, to improve readability. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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d785a06a |
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02-Jan-2024 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: remove common.h inclusion The usage of the common.h include file is deprecated, and has already been removed from several files. Get rid of all inclusions in the arch/arm/mach-sunxi directory. Most files actually don't need the header at all, for the few others just include the headers that we actually require. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
1b2a3d08 |
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24-Oct-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-imx-20231024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20231024 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211 - Fixes for MC2432 Eeprom - i.MX93 ADC - Secondary boot mode on i.MX8M
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#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
e936db95 |
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16-Oct-2023 |
Marek Vasut <marex@denx.de> |
spl: mmc: Introduce proper layering for spl_mmc_get_uboot_raw_sector() Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at a matching level, that is arch/ and board/ , in addition to the existing weak function spl_mmc_get_uboot_raw_sector(). This way, architecture code can define a default architecture specific implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board code can override that using board_spl_mmc_get_uboot_raw_sector() which takes precedence over the architecture code. In some sort of unlikely special case where code has to take precedence over board code too, the spl_mmc_get_uboot_raw_sector() is still left out to be a weak function, but it should be unlikely that this is ever needed to be overridden. Signed-off-by: Marek Vasut <marex@denx.de> |
#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d785a06a |
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02-Jan-2024 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: remove common.h inclusion The usage of the common.h include file is deprecated, and has already been removed from several files. Get rid of all inclusions in the arch/arm/mach-sunxi directory. Most files actually don't need the header at all, for the few others just include the headers that we actually require. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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1b2a3d08 |
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24-Oct-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-imx-20231024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20231024 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211 - Fixes for MC2432 Eeprom - i.MX93 ADC - Secondary boot mode on i.MX8M
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#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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e936db95 |
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16-Oct-2023 |
Marek Vasut <marex@denx.de> |
spl: mmc: Introduce proper layering for spl_mmc_get_uboot_raw_sector() Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at a matching level, that is arch/ and board/ , in addition to the existing weak function spl_mmc_get_uboot_raw_sector(). This way, architecture code can define a default architecture specific implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board code can override that using board_spl_mmc_get_uboot_raw_sector() which takes precedence over the architecture code. In some sort of unlikely special case where code has to take precedence over board code too, the spl_mmc_get_uboot_raw_sector() is still left out to be a weak function, but it should be unlikely that this is ever needed to be overridden. Signed-off-by: Marek Vasut <marex@denx.de> |
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d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1b2a3d08 |
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24-Oct-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-imx-20231024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20231024 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211 - Fixes for MC2432 Eeprom - i.MX93 ADC - Secondary boot mode on i.MX8M
|
#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
e936db95 |
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16-Oct-2023 |
Marek Vasut <marex@denx.de> |
spl: mmc: Introduce proper layering for spl_mmc_get_uboot_raw_sector() Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at a matching level, that is arch/ and board/ , in addition to the existing weak function spl_mmc_get_uboot_raw_sector(). This way, architecture code can define a default architecture specific implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board code can override that using board_spl_mmc_get_uboot_raw_sector() which takes precedence over the architecture code. In some sort of unlikely special case where code has to take precedence over board code too, the spl_mmc_get_uboot_raw_sector() is still left out to be a weak function, but it should be unlikely that this is ever needed to be overridden. Signed-off-by: Marek Vasut <marex@denx.de> |
#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
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7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
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382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
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843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
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9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
|
03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
|
03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d768dd88 |
|
12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
64531496 |
|
27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
|
20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
|
05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
|
12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
|
10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
|
15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
382b8371 |
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24-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: support TOC0 on boot partitions To determine whether we have been booted from an eMMC boot partition, we replay some of the checks that the BROM must have done to successfully load the SPL. This involves a checksum check, which currently relies on the SPL being wrapped in an "eGON" header. If a board has secure boot enabled, the BROM will only accept the "TOC0" format, which is internally very different, but uses the same checksumming algorithm. Actually the only difference for calculating the checksum is that the size of the SPL is stored at a different offset. Do a header check to determine whether we deal with an eGON or TOC0 format, then set the SPL size accordingly. The rest of the code is unchanged. This fixes booting from an eMMC boot partition on devices with secure boot enabled, like the Remix Mini PC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
7f0938ea |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fel: drop redundant "control register" save/restore For some reasons shrouded in mystery, the code saving the FEL state was saving the SCTLR register twice, with the second copy trying to justify itself by using its ancient "control register" alias name. Drop the redundant second copy, both from the fel_stash data structure, and also the code saving and restoring it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
64531496 |
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27-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: annotate #endif lines The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
98463903 |
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20-Oct-2022 |
Simon Glass <sjg@chromium.org> |
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
843ed983 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
suniv: add UART1 support Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> |
#
9a916b07 |
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13-Oct-2022 |
Icenowy Zheng <uwu@icenowy.me> |
sunxi: fix SUNIV build when enabling D-Cache The enable_caches function in architecture-specific board code is only necessary for V7A CPUs, code for both V8A and ARM926 have already declared this function. Only provide our implementation of enable_caches() for V7A CPUs. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
|
#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e26ece26 |
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05-May-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: board: Fix UART PortF pinmux setup When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
|
#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
|
03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b9a2e185 |
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12-Jul-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: eMMC: Improve automatic boot source detection When the Allwinner BROM loads the SPL from an eMMC boot partition, it sets the boot source byte to the same value as when booting from the user data partition. This prevents us from determining the boot source to load U-Boot proper from the proper partition for sure. The generic SPL MMC code already looks at the enabled boot partition number, to load U-Boot proper from the same partition, but this fails if there is nothing bootable in this partition, as the BROM then silently falls back to the user data partition, which the SPL misses. To learn about the actual boot source anyway, we repeat the algorithm the BROM used to select the boot partition in the first place: - Test EXT_CSD[179] to check if an eMMC boot partition is enabled. - Test EXT_CSD[177] to check for valid MMC interface settings. - Check if BOOT_ACK is enabled. - Check the beginning of the first sector for a valid eGON signature. - Load the whole SPL. - Recalculate the checksum to verify the SPL is valid. If one of those steps fails, we bail out and continue loading from the user data partition. Otherwise we load from the selected boot partition. Since the boot source is needed twice in the boot process, we cache the result of this test to avoid doing this costly test multiple times. This allows the very same image file to be put onto an SD card, into the eMMC user data partition or into the eMMC boot partition, and safely loads the whole of U-Boot from there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
482c1ccd |
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09-Oct-2021 |
Angelo Dureghello <angelo.dureghello@timesys.com> |
sunxi: H3: fix non working console on uart2 Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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44de13d9 |
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17-Mar-2022 |
Samuel Holland <samuel@sholland.org> |
sunxi: Support SPL in both eGON and TOC0 images SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
|
02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
|
30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
|
30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
|
24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
|
#
cd4b0c5f |
|
24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
|
03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e943753d |
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14-Mar-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Fix old GMAC pinmux setup Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()") moved the call to eth_init_board() from s_init() into board_init_f(). This means it's now only called from the SPL, which makes sense for most of the other moved low-level functions. However the GMAC pinmux and clock setup in eth_init_board() was not happy about that, so it broke the sun7i GMAC. Since Ethernet is of no use in the SPL anyway, just move the call into board_init(), which is only run in U-Boot proper. This fixes Ethernet operation for the A20 SoCs, which broke in v2022.04-rc1, with the above mentioned commit. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2] |
#
a08b04b5 |
|
11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
|
15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
|
14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
a08b04b5 |
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11-Feb-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
mach-sunxi: Add boot device detection for SUNIV/F1C100s In contrast to other Allwinner SoCs the F1C100s BROM does not store a boot source indicator in the eGON header in SRAM. This leaves the SPL guessing where we were exactly booted from, and for instance trying the SD card first, even though we booted from SPI flash. By inspecting the BROM code and by experimentation, Samuel found that the top of the BROM stack contains unique pointers for each of the boot sources, which we can use as a boot source indicator. This patch removes the existing board_boot_order bodge and replace it with a proper boot source indication function. The only caveat is that this only works in the SPL, as the SPL header gets overwritten with the exception vectors, once U-Boot proper takes over. Always return MMC0 as the boot source, when called from U-Boot proper, as a placeholder for now, until we find another way. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Suggested-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
cfe673cd |
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29-Jan-2022 |
Icenowy Zheng <icenowy@aosc.io> |
mach-sunxi: Add support for SUNIV architecture Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b8cd7f43 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
armv8: remove no longer needed lowlevel_init.S When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
534b82a1 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move early "SRAM setup" into separate file Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
2564fce7 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move Cortex SMPEN setting into start.S According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
5bc4cd05 |
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22-Jan-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: move non-essential code out of s_init() So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
|
10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
|
09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
6e19dc84 |
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03-Nov-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Avoid duplicate reset_cpu with SYSRESET enabled The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ea261fde |
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07-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Only initialize legacy I2C when enabled CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level Kconfig symbol (not specific to either legacy or DM I2C), whereas the i2c_init() function is specific to legacy I2C. This change fixes a build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
975e7cf3 |
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10-Jul-2021 |
Simon Glass <sjg@chromium.org> |
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b8747854 |
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28-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: H616: Enable full 4GB of DRAM The H616 is our first supported Allwinner SoC which goes beyond the 4GB address space "barrier", by having more than 32 address bits. Lift the preliminary 3GB DRAM limit for the H616, and update the page table setup on the way, to actually map that last GB as well. As not all devices are actually capable of dealing with more than 32 bits (the DMA in the EMAC for instance), we also limit U-Boot's own DRAM usage to 4GB on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
|
#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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236f2ec4 |
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20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
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7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
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44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
|
29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
35b65dd8 |
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15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2147a169 |
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09-Feb-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7f4e294b |
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14-Feb-2021 |
Tobias Schramm <t.schramm@manjaro.org> |
sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
c13d98b7 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: add support for H616 uart0 This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c0b417b2 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: support loading with SPL > 32KB H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> |
#
44726096 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: Introduce common symbol for H6 like SoCs It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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691d719d |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c841d84 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Automate loading from 128KB MMC offset Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
ee98d768 |
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09-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: SPL: Factor out sunxi_get_boot_source() The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
9edefc27 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
5f19c930 |
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23-Apr-2019 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: set PIO voltage to hardware-detected value on startup on H6 The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [jagan: s/__maybe__unused/__maybe_unused] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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#
26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
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f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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79764b50 |
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20-May-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi - H6 WDT reset fix (Clément) - H6 SPL_TEXT_BASE fixes (Clément, Jonas) - NPI-M1+ emac enablment (Emmanuel)
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26f8e0d7 |
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17-Apr-2019 |
Clément Péron <peron.clem@gmail.com> |
arm: sunxi: h6: fix reset using r_wdog Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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10015025 |
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03-May-2019 |
Trevor Woerner <trevor@toganlabs.com> |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com> |
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067e0b96 |
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15-Dec-2018 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> |
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7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
379febac |
|
29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
7b82a229 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
85db5831 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
eb77f5c9 |
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02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
40ecf524 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
66669fcf |
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19-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
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#
cd4b0c5f |
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24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org> |
#
28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7009134c |
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25-Oct-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: map DRAM part with 3G size All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
7f51a402 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add UART0 setup for H6 The UART0 on H6 is available at PH bank (and PF bank, but the PF one is muxed with SD card). Add pinmux configuration. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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#
10196c96 |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: use sun6i-style watchdog for H6 The H6 SoC has a sun6i-style watchdog in its timer part. Enable the usage of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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#
9508ecfb |
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04-Jun-2018 |
Chris Packham <judge.packham@gmail.com> |
ARM: sunxi: remove empty #ifdef/endif block Whatever code this was guarding has been removed so remove the guards too. Signed-off-by: Chris Packham <judge.packham@gmail.com>
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#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
d024236e |
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18-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
d695d662 |
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03-Feb-2018 |
Lukasz Majewski <lukma@denx.de> |
spl: eMMC/SD: Provide one __weak spl_boot_mode() function The goal of this patch is to clean up the code related to choosing SPL MMC boot mode. The spl_boot_mode() now is called only in spl_mmc_load_image() function, which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled. To achieve the goal, all per mach/arch implementations eligible for unification has been replaced with one __weak implementation. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP) Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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#
8829076a |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm: sunxi: Move spl_boot_device in a separate function U-Boot itself might need to identify the boot device, for example to be able to tell where to load the kernel from when several options are possible. Move the logic of spl_boot_device to a function that is compiled both for the SPL and the main binary. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
a8f01ccf |
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26-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
sunxi: i2c: Add support for DM I2C This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
c199489f |
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08-Apr-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
6c7ae2bf |
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30-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Fix watchdog reset function for R40 The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
379febac |
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29-Nov-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add initial support for R40 The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
7b82a229 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
ce6912e1 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: provide ARMv8 mem_map for every ARM64 board Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
85db5831 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: simplify ACTLR.SMP bit set #ifdef Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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#
1afd0f6f |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: fix ACTLR.SMP assembly routine If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
eb77f5c9 |
|
02-Jan-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: A64: enable SPL Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
40ecf524 |
|
30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: sunxi: Drop spl_board_announce_boot_device() This function is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
ebc4ef61 |
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30-Nov-2016 |
Simon Glass <sjg@chromium.org> |
spl: Add a name to the SPL load-image methods It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f28bad13 |
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28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: Enable SMP mode for the boot CPU on sun9i (A80) Since the A80 has many cores which we intend to use in SMP fashion, we should set the SMP bit for the boot CPU. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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#
2a2ee2ac |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Pass spl_image as a parameter to load_image() methods Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
97d9df0a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert spl_board_load_image() to use linker list Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
ecdfd69a |
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24-Sep-2016 |
Simon Glass <sjg@chromium.org> |
spl: Convert boot_device into a struct At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
cd4b0c5f |
|
24-Jun-2016 |
York Sun <york.sun@nxp.com> |
armv8: mmu: Add support of non-identical mapping Introduce virtual and physical addresses in the mapping table. This change have no impact on existing boards because they all use idential mapping. Signed-off-by: York Sun <york.sun@nxp.com>
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#
ef36d9ae |
|
09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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19e99fb4 |
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07-Jun-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support booting from SPI flash Allwinner devices support SPI flash as one of the possible bootable media type. The SPI flash chip needs to be connected to SPI0 pins (port C) to make this work. More information is available at: https://linux-sunxi.org/Bootable_SPI_flash This patch adds the initial support for booting from SPI flash. The existing SPI frameworks are not used in order to reduce the SPL code size. Right now the SPL size grows by ~370 bytes when CONFIG_SPL_SPI_SUNXI option is enabled. While there are no popular Allwinner devices with SPI flash at the moment, testing can be done using a SPI flash module (it can be bought for ~2$ on ebay) and jumper wires with the boards, which expose relevant pins on the expansion header. The SPI flash chips themselves are very cheap (some prices are even listed as low as 4 cents) and should not cost much if somebody decides to design a development board with an SPI flash chip soldered on the PCB. Another nice feature of the SPI flash is that it can be safely accessed in a device-independent way (since we know that the boot ROM is already probing these pins during the boot time). And if, for example, Olimex boards opted to use SPI flash instead of EEPROM, then they would have been able to have U-Boot installed in the SPI flash now and boot the rest of the system from the SATA hard drive. Hopefully we may see new interesting Allwinner based development boards in the future, now that the software support for the SPI flash is in a better shape :-) Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option in a board defconfig, then building U-Boot and finally flashing the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with a help of the sunxi-fel tool: sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin The device needs to be switched into FEL (USB recovery) mode first. The most suitable boards for testing are Orange Pi PC and Pine64. Because these boards are cheap, have no built-in NAND/eMMC and expose SPI0 pins on the Raspberry Pi compatible expansion header. The A13-OLinuXino-Micro board also can be used. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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2b1cdafa |
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14-May-2016 |
Marek Vasut <marex@denx.de> |
common: Pass the boot device into spl_boot_mode() The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
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28d68045 |
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03-Apr-2016 |
Bernhard Nortmann <bernhard.nortmann@web.de> |
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL" This addresses a cosmetic issue when booting a sunxi device over USB (FEL mode), where the SPL currently would just print "Trying to boot from ". The patch fixes that to properly read "Trying to boot from FEL". Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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e6e505b9 |
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29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Move cpu independent code to mach directory Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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