| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 493 MUX(CLK_TOP_UART0_SEL, uart0_parents, 0x000, 0, 1),
494 MUX(CLK_TOP_GFMUX_EMI1X_SEL, gfmux_emi1x_parents, 0x000, 1, 1),
495 MUX(CLK_TOP_EMI_DDRPHY_SEL, emi_ddrphy_parents, 0x000, 2, 1),
496 MUX(CLK_TOP_AHB_INFRA_SEL, ahb_infra_parents, 0x000, 4, 4),
497 MUX(CLK_TOP_CSW_MUX_MFG_SEL, csw_mux_mfg_parents, 0x000, 8, 3),
498 MUX(CLK_TOP_MSDC0_SEL, msdc0_parents, 0x000, 11, 3),
499 MUX(CLK_TOP_PWM_MM_SEL, pwm_mm_parents, 0x000, 18, 1),
500 MUX(CLK_TOP_UART1_SEL, uart1_parents, 0x000, 19, 1),
501 MUX(CLK_TOP_MSDC1_SEL, msdc1_parents, 0x000, 20, 3),
502 MUX(CLK_TOP_SPM_52M_SE
[all...] |
| H A D | clk-mt8518.c | 1180 MUX(CLK_TOP_UART0_SEL, uart0_parents, 0x000, 0, 1),
1181 MUX(CLK_TOP_EMI1X_SEL, emi1x_parents, 0x000, 1, 1),
1182 MUX(CLK_TOP_EMI_DDRPHY_SEL, emi_ddrphy_parents, 0x000, 2, 1),
1183 MUX(CLK_TOP_MSDC1_SEL, msdc1_parents, 0x000, 4, 8),
1184 MUX(CLK_TOP_PWM_MM_SEL, pwm_mm_parents, 0x000, 18, 1),
1185 MUX(CLK_TOP_UART1_SEL, uart0_parents, 0x000, 19, 1),
1186 MUX(CLK_TOP_SPM_52M_SEL, uart0_parents, 0x000, 22, 1),
1187 MUX(CLK_TOP_PMICSPI_SEL, pmicspi_parents, 0x000, 23, 3),
1189 MUX(CLK_TOP_NFI2X_SEL, nfi2x_parents, 0x004, 0, 3),
1190 MUX(CLK_TOP_DDRPHYCFG_SE
[all...] |
| H A D | clk-mt8183.c | 540 MUX(CLK_TOP_MUX_AXI, axi_parents, 0x40, 0, 2),
541 MUX(CLK_TOP_MUX_MM, mm_parents, 0x40, 8, 3),
542 MUX(CLK_TOP_MUX_IMG, img_parents, 0x40, 16, 3),
543 MUX(CLK_TOP_MUX_CAM, cam_parents, 0x40, 24, 4),
545 MUX(CLK_TOP_MUX_DSP, dsp_parents, 0x50, 0, 4),
546 MUX(CLK_TOP_MUX_DSP1, dsp1_parents, 0x50, 8, 4),
547 MUX(CLK_TOP_MUX_DSP2, dsp2_parents, 0x50, 16, 4),
548 MUX(CLK_TOP_MUX_IPU_IF, ipu_if_parents, 0x50, 24, 4),
550 MUX(CLK_TOP_MUX_MFG, mfg_parents, 0x60, 0, 2),
551 MUX(CLK_TOP_MUX_F52M_MF
[all...] |
| H A D | clk-mt7622.c | 361 MUX(CLK_TOP_APLL1_SEL, apll1_ck_parents, 0x120, 6, 1),
362 MUX(CLK_TOP_APLL2_SEL, apll1_ck_parents, 0x120, 7, 1),
363 MUX(CLK_TOP_I2S0_MCK_SEL, apll1_ck_parents, 0x120, 8, 1),
364 MUX(CLK_TOP_I2S1_MCK_SEL, apll1_ck_parents, 0x120, 9, 1),
365 MUX(CLK_TOP_I2S2_MCK_SEL, apll1_ck_parents, 0x120, 10, 1),
366 MUX(CLK_TOP_I2S3_MCK_SEL, apll1_ck_parents, 0x120, 161, 1),
|
| H A D | clk-mtk.h | 145 #define MUX(_id, _parents, _reg, _shift, _width) { \ macro
|
| H A D | clk-mt7623.c | 569 MUX(CLK_TOP_PADMCLK_SEL, padmclk_parents, 0x100, 0, 3),
571 MUX(CLK_TOP_AUD_MUX1_SEL, aud_mux_parents, 0x12c, 0, 3),
572 MUX(CLK_TOP_AUD_MUX2_SEL, aud_mux_parents, 0x12c, 3, 3),
573 MUX(CLK_TOP_AUDPLL_MUX_SEL, aud_mux_parents, 0x12c, 6, 3),
|
| /u-boot/drivers/clk/exynos/ |
| H A D | clk-exynos850.c | 108 MUX(CLK_MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
110 MUX(CLK_MOUT_SHARED1_PLL, "mout_shared1_pll", mout_shared1_pll_p,
112 MUX(CLK_MOUT_MMC_PLL, "mout_mmc_pll", mout_mmc_pll_p,
134 MUX(CLK_MOUT_CORE_BUS, "mout_core_bus", mout_core_bus_p,
136 MUX(CLK_MOUT_CORE_CCI, "mout_core_cci", mout_core_cci_p,
138 MUX(CLK_MOUT_CORE_MMC_EMBD, "mout_core_mmc_embd", mout_core_mmc_embd_p,
140 MUX(CLK_MOUT_CORE_SSS, "mout_core_sss", mout_core_sss_p,
169 MUX(CLK_MOUT_HSI_BUS, "mout_hsi_bus", mout_hsi_bus_p,
171 MUX(CLK_MOUT_HSI_MMC_CARD, "mout_hsi_mmc_card", mout_hsi_mmc_card_p,
173 MUX(CLK_MOUT_HSI_USB20DR
[all...] |
| H A D | clk.h | 100 #define MUX(_id, cname, pnames, o, s, w) \ macro
|
| /u-boot/lib/rsa/ |
| H A D | rsa-keyprop.c | 64 static uint32_t MUX(uint32_t ctl, uint32_t x, uint32_t y) function
123 c = GT(x, 0xFFFF); x = MUX(c, x >> 16, x); k += c << 4;
124 c = GT(x, 0x00FF); x = MUX(c, x >> 8, x); k += c << 3;
125 c = GT(x, 0x000F); x = MUX(c, x >> 4, x); k += c << 2;
126 c = GT(x, 0x0003); x = MUX(c, x >> 2, x); k += c << 1;
200 tw = MUX(c, w, tw);
201 twk = MUX(c, (uint32_t)xlen, twk);
318 return MUX(x & 1, -y, 0);
349 a[u] = MUX(ctl, naw, aw);
382 a[u] = MUX(ct
[all...] |
| /u-boot/drivers/clk/ |
| H A D | clk_k210.c | 230 #define MUX(id, reg, shift, width) \ macro
235 MUX(K210_CLK_ACLK, K210_SYSCTL_SEL0, 0, 1) \
236 MUX(K210_CLK_SPI3, K210_SYSCTL_SEL0, 12, 1) \
237 MUX(K210_CLK_TIMER0, K210_SYSCTL_SEL0, 13, 1) \
238 MUX(K210_CLK_TIMER1, K210_SYSCTL_SEL0, 14, 1) \
239 MUX(K210_CLK_TIMER2, K210_SYSCTL_SEL0, 15, 1)
264 #undef MUX macro
|