Searched refs:L2 (Results 1 - 5 of 5) sorted by relevance
| /u-boot/arch/arm/mach-npcm/npcm7xx/ |
| H A D | l2_cache_pl310_init.S | 21 @ Disable L2 Cache controller just in case it is already on
56 @ Ensure L2 remains disabled for the time being
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| /u-boot/arch/x86/include/asm/arch-braswell/ |
| H A D | gpio.h | 33 L2, enumerator in enum:int_select
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| /u-boot/arch/x86/cpu/intel_common/ |
| H A D | car2.S | 241 * Disable both L1 and L2 prefetcher. For yet-to-understood reason,
251 * If CAR size is set to full L2 size, mask is calculated as all-zeros.
254 #error "CQOS CAR may not use whole L2 cache area"
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| /u-boot/arch/arm/cpu/armv7/ |
| H A D | start.S | 317 @ lines allocate in the L1 or L2 cache.
374 orrlt r0, r0, #(0x1 << 27) @ L2 PLD data forwarding disable
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| /u-boot/board/intel/cherryhill/ |
| H A D | cherryhill.c | 291 TRIG_LEVEL, L2, NA, NA, NA, NON_MASKABLE,
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