Searched refs:JH7110_SYSCLK_UART5_CORE (Results 1 - 10 of 10) sorted by relevance
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 172 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 173 #define JH7110_SYSCLK_UART5_CORE 156 macro
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| /u-boot/drivers/clk/starfive/ |
| H A D | clk-jh7110.c | 174 offset == OFFSET(JH7110_SYSCLK_UART5_CORE)) {
425 clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART5_CORE),
428 OFFSET(JH7110_SYSCLK_UART5_CORE), 8));
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