Searched refs:JH7110_STGCLK_PCIE0_AXI (Results 1 - 9 of 9) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h234 #define JH7110_STGCLK_PCIE0_AXI 8 macro
/u-boot/drivers/clk/starfive/
H A Dclk-jh7110.c526 clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE0_AXI),
529 OFFSET(JH7110_STGCLK_PCIE0_AXI)));

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