Searched refs:HHI_MPLL_CNTL8 (Results 1 - 5 of 5) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-meson/ |
| H A D | clock-axg.h | 86 #define HHI_MPLL_CNTL8 0x29C macro
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| H A D | clock-g12a.h | 84 #define HHI_MPLL_CNTL8 0x298 macro
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| H A D | clock-gx.h | 81 #define HHI_MPLL_CNTL8 0x29C /* 0xa7 offset in data sheet */ macro
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| /u-boot/drivers/clk/meson/ |
| H A D | axg.c | 138 {HHI_MPLL_CNTL8, 0, 14}, /* psdm */
139 {HHI_MPLL_CNTL8, 16, 9}, /* pn2 */
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| H A D | gxbb.c | 182 MESON_GATE(CLKID_MPLL1, HHI_MPLL_CNTL8, 14),
626 {HHI_MPLL_CNTL8, 0, 14}, /* psdm */
627 {HHI_MPLL_CNTL8, 16, 9}, /* pn2 */
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