Searched refs:GPO (Results 1 - 3 of 3) sorted by relevance
| /u-boot/board/intel/cherryhill/ |
| H A D | cherryhill.c | 28 GPIO_PAD_CONF("N48: GP_CAMERASB00", GPIO, M1, GPO, LOW,
31 GPIO_PAD_CONF("N53: GP_CAMERASB01", GPIO, M1, GPO, LOW,
34 GPIO_PAD_CONF("N46: GP_CAMERASB02", GPIO, M1, GPO, LOW,
37 GPIO_PAD_CONF("N51: GP_CAMERASB03", GPIO, M1, GPO, LOW,
40 GPIO_PAD_CONF("N56: GP_CAMERASB04", GPIO, M1, GPO, LOW,
43 GPIO_PAD_CONF("N45: GP_CAMERASB05", GPIO, M1, GPO, LOW,
46 GPIO_PAD_CONF("N49: GP_CAMERASB06", GPIO, M1, GPO, LOW,
49 GPIO_PAD_CONF("N54: GP_CAMERASB07", GPIO, M1, GPO, LOW,
52 GPIO_PAD_CONF("N47: GP_CAMERASB08", GPIO, M1, GPO, LOW,
55 GPIO_PAD_CONF("N52: GP_CAMERASB09", GPIO, M1, GPO, LO
[all...] |
| /u-boot/arch/x86/include/asm/arch-braswell/ |
| H A D | gpio.h | 52 GPO = 1, /* GPO, output only in PAD_VALUE */ enumerator in enum:gpio_en
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| /u-boot/drivers/pinctrl/nuvoton/ |
| H A D | pinctrl-npcm7xx.c | 699 #define GPI 0x1 /* Not GPO */
700 #define GPO 0x2 /* Not GPI */ macro
754 NPCM7XX_PINCFG(42, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, DS(2, 4) | GPO),
760 NPCM7XX_PINCFG(48, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, GPO),
763 NPCM7XX_PINCFG(51, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO),
765 NPCM7XX_PINCFG(53, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO),
773 NPCM7XX_PINCFG(61, uart1, MFSEL1, 10, none, NONE, 0, none, NONE, 0, GPO),
774 NPCM7XX_PINCFG(62, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO),
775 NPCM7XX_PINCFG(63, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO),
900 NPCM7XX_PINCFG(184, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW | GPO),
[all...] |
Completed in 122 milliseconds