intel/cherryhill/cherryhill.c

28 	GPIO_PAD_CONF("N48: GP_CAMERASB00", GPIO, M1, GPO, LOW,
31 	GPIO_PAD_CONF("N53: GP_CAMERASB01", GPIO, M1, GPO, LOW,
34 	GPIO_PAD_CONF("N46: GP_CAMERASB02", GPIO, M1, GPO, LOW,
37 	GPIO_PAD_CONF("N51: GP_CAMERASB03", GPIO, M1, GPO, LOW,
40 	GPIO_PAD_CONF("N56: GP_CAMERASB04", GPIO, M1, GPO, LOW,
43 	GPIO_PAD_CONF("N45: GP_CAMERASB05", GPIO, M1, GPO, LOW,
46 	GPIO_PAD_CONF("N49: GP_CAMERASB06", GPIO, M1, GPO, LOW,
49 	GPIO_PAD_CONF("N54: GP_CAMERASB07", GPIO, M1, GPO, LOW,
52 	GPIO_PAD_CONF("N47: GP_CAMERASB08", GPIO, M1, GPO, LOW,
55 	GPIO_PAD_CONF("N52: GP_CAMERASB09", GPIO, M1, GPO, LOW,
58 	GPIO_PAD_CONF("N50: GP_CAMERASB10", GPIO, M1, GPO, LOW,
61 	GPIO_PAD_CONF("N55: GP_CAMERASB11", GPIO, M1, GPO, LOW,
76 	GPIO_PAD_CONF("N05: GPIO_DFX4", GPIO, M1, GPO, HIGH, NA,
79 	GPIO_PAD_CONF("N04: GPIO_DFX5", GPIO, M1, GPO, HIGH, NA,
85 	GPIO_PAD_CONF("N02: GPIO_DFX7", GPIO, M1, GPO, LOW, NA,
100 	GPIO_PAD_CONF("N22: GPIO_SUS4", GPIO, M1, GPO, HIGH, NA,
103 	GPIO_PAD_CONF("N20: GPIO_SUS5", GPIO, M1, GPO, HIGH, NA,
202 	GPIO_PAD_CONF("E19: MF_ISH_GPIO_5", GPIO, M1, GPO, HIGH, NA,
208 	GPIO_PAD_CONF("E16: MF_ISH_GPIO_7", GPIO, M1, GPO, HIGH, NA,
333 	GPIO_PAD_CONF("SE03: MF_PLT_CLK4", GPIO, M1, GPO, LOW, NA,
336 	GPIO_PAD_CONF("SE06: MF_PLT_CLK5", GPIO, M3, GPO, LOW, NA,
342 	GPIO_PAD_CONF("SE05: PWM0", GPIO, M1, GPO, LOW, NA,
345 	GPIO_PAD_CONF("SE01: PWM1", GPIO, M1, GPO, HIGH, NA,
420 	GPIO_PAD_CONF("SW04: FST_SPI_CS1_B", GPIO, M1, GPO, HIGH, NA,
423 	GPIO_PAD_CONF("SW07: FST_SPI_CS2_B", GPIO, M1, GPO, LOW, NA,
522 	GPIO_PAD_CONF("SW75: SATA_GP0", GPIO, M1, GPO, HIGH, NA,
558 	GPIO_PAD_CONF("SW75: SATA_GP0", GPIO, M1, GPO, HIGH, NA, NA,