| /u-boot/arch/mips/mach-jz47xx/jz4780/ |
| H A D | gpio.c | 10 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
19 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
30 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
|
| /u-boot/drivers/pch/ |
| H A D | pch9.c | 13 #define GPIO_BASE 0x48 macro
32 * GPIO_BASE moved to its current offset with ICH6, but prior to
41 dm_pci_read_config32(dev, GPIO_BASE, &base);
|
| H A D | pch7.c | 11 #define GPIO_BASE 0x44 macro
46 * GPIO_BASE moved to its current offset with ICH6, but prior to
55 dm_pci_read_config32(dev, GPIO_BASE, &base);
|
| /u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | cpu.h | 28 #define GPIO_BASE 0x40028000 /* GPIO registers base */ macro
|
| /u-boot/board/timll/devkit3250/ |
| H A D | devkit3250_spl.c | 16 static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
|
| /u-boot/board/imgtec/ci20/ |
| H A D | ci20.c | 32 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
47 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
74 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
86 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
110 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
221 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
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| /u-boot/arch/x86/cpu/ivybridge/ |
| H A D | bd82x6x.c | 27 #define GPIO_BASE 0x48 macro
200 * GPIO_BASE moved to its current offset with ICH6, but prior to
209 dm_pci_read_config32(dev, GPIO_BASE, &base);
|
| H A D | lpc.c | 498 dm_pci_write_config32(dev->parent, GPIO_BASE, DEFAULT_GPIOBASE | 1);
|
| /u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| H A D | cpu.h | 93 SAMSUNG_BASE(gpio, GPIO_BASE)
|
| /u-boot/arch/sh/include/asm/ |
| H A D | cpu_sh7752.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
|
| H A D | cpu_sh7753.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
|
| /u-boot/arch/x86/include/asm/arch-broadwell/ |
| H A D | pch.h | 13 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
|
| /u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780.h | 23 #define GPIO_BASE 0xb0010000 macro
|
| /u-boot/arch/x86/include/asm/arch-ivybridge/ |
| H A D | pch.h | 72 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
95 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
|
| /u-boot/arch/mips/mach-mtmips/mt7621/ |
| H A D | mt7621.h | 17 #define GPIO_BASE 0x1e000600 macro
|
| /u-boot/drivers/gpio/ |
| H A D | lpc32xx_gpio.c | 306 gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
|
| /u-boot/arch/x86/cpu/broadwell/ |
| H A D | pch.c | 50 dm_pci_write_config32(dev, GPIO_BASE, GPIO_BASE_ADDRESS | 1);
636 dm_pci_read_config32(dev, GPIO_BASE, gbasep);
|
| /u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt7986.c | 19 PIN_FIELD_BASE_CALC(_s_pin, _e_pin, GPIO_BASE, _s_addr, _x_addrs, \
69 GPIO_BASE, enumerator in enum:__anon6
|
| H A D | pinctrl-mt7981.c | 19 PIN_FIELD_BASE_CALC(_s_pin, _e_pin, GPIO_BASE, _s_addr, _x_addrs, \
70 GPIO_BASE, enumerator in enum:__anon5
|
| H A D | pinctrl-mt7988.c | 11 GPIO_BASE, enumerator in enum:MT7988_PINCTRL_REG_PAGE
29 PIN_FIELD_BASE_CALC(_s_pin, _e_pin, GPIO_BASE, _s_addr, _x_addrs, \
|