Searched refs:CLK_ARM (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/mach-rockchip/rk3288/
H A Drk3288.c157 { "apll", CLK_ARM },
/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h38 CLK_ARM, enumerator in enum:rk_clk_id
/u-boot/drivers/clk/rockchip/
H A Dclk_rv1108.c54 case CLK_ARM:
157 pll_rate = rkclk_pll_get_rate(cru, CLK_ARM);
647 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
654 apll = rkclk_pll_get_rate(cru, CLK_ARM);
H A Dclk_rk3036.c95 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
H A Dclk_rk3328.c223 case CLK_ARM:
321 rkclk_set_pll(cru, CLK_ARM, apll_cfgs[apll_freq]);
H A Dclk_rk322x.c97 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
H A Dclk_rk3128.c156 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
H A Dclk_rk3066.c197 rk3066_clk_set_pll(cru, CLK_ARM, &apll_cfg[cfg]);
H A Dclk_rk3188.c205 rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj);
H A Dclk_rk3288.c507 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);

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