Searched refs:mepc (Results 1 - 12 of 12) sorted by relevance

/seL4-test-master/tools/riscv-pk/machine/
H A Dfp_ldst.c8 return write_csr(mbadaddr, addr), (handler)(regs, mcause, mepc)
16 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
22 SET_F32_RD(insn, regs, load_int32_t((void *)addr, mepc));
27 SET_F64_RD(insn, regs, load_uint64_t((void *)addr, mepc));
31 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
41 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
47 store_uint32_t((void *)addr, GET_F32_RS2(insn, regs), mepc);
52 store_uint64_t((void *)addr, GET_F64_RS2(insn, regs), mepc);
56 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
H A Dunprivileged_memory.h11 static inline type load_##type(const type* addr, uintptr_t mepc) \
13 register uintptr_t __mepc asm ("a2") = mepc; \
25 static inline void store_##type(type* addr, type val, uintptr_t mepc) \
27 register uintptr_t __mepc asm ("a2") = mepc; \
54 static inline uint64_t load_uint64_t(const uint64_t* addr, uintptr_t mepc)
56 return load_uint32_t((uint32_t*)addr, mepc)
57 + ((uint64_t)load_uint32_t((uint32_t*)addr + 1, mepc) << 32);
60 static inline void store_uint64_t(uint64_t* addr, uint64_t val, uintptr_t mepc)
62 store_uint32_t((uint32_t*)addr, val, mepc);
63 store_uint32_t((uint32_t*)addr + 1, val >> 32, mepc);
67 get_insn(uintptr_t mepc, uintptr_t* mstatus) argument
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H A Demulation.c15 write_csr(mepc, mepc + 2);
19 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
24 return misaligned_load_trap(regs, mcause, mepc);
25 SET_F64_RD(RVC_RS2S(insn) << SH_RD, regs, load_uint64_t((void *)addr, mepc));
29 return misaligned_load_trap(regs, mcause, mepc);
30 SET_F64_RD(insn, regs, load_uint64_t((void *)addr, mepc));
34 return misaligned_store_trap(regs, mcause, mepc);
35 store_uint64_t((void *)addr, GET_F64_RS2(RVC_RS2S(insn) << SH_RS2, regs), mepc);
39 return misaligned_store_trap(regs, mcause, mepc);
71 illegal_insn_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) argument
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H A Dmtrap.c20 void __attribute__((noreturn)) bad_trap(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc) argument
22 die("machine mode: unhandlable trap %d @ %p", read_csr(mcause), mepc);
107 mask &= load_uintptr_t(pmask, read_csr(mepc));
132 void mcall_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) argument
134 write_csr(mepc, mepc + 4);
204 write_csr(mepc, read_csr(stvec));
217 void pmp_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) argument
219 redirect_trap(mepc, read_csr(mstatus), read_csr(mbadaddr));
222 static void machine_page_fault(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc) argument
232 trap_from_machine_mode(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc) argument
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H A Dfp_emulation.c49 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
56 return f(regs, mcause, mepc, mstatus, insn);
62 void emulate_any_fadd(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc, uintptr_t mstatus, insn_t insn, int32_t neg_b) argument
73 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
79 return emulate_any_fadd(regs, mcause, mepc, mstatus, insn, 0);
84 return emulate_any_fadd(regs, mcause, mepc, mstatus, insn, INT32_MIN);
98 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
113 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
120 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
127 return truly_illegal_insn(regs, mcause, mepc, mstatu
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H A Dmisaligned_ldst.c16 void misaligned_load_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) argument
20 insn_t insn = get_insn(mepc, &mstatus);
21 uintptr_t npc = mepc + insn_len(insn);
70 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
75 val.bytes[i] = load_uint8_t((void *)(addr + i), mepc);
84 write_csr(mepc, npc);
87 void misaligned_store_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) argument
91 insn_t insn = get_insn(mepc, &mstatus);
92 uintptr_t npc = mepc + insn_len(insn);
137 return truly_illegal_insn(regs, mcause, mepc, mstatu
[all...]
H A Demulation.h12 #define DECLARE_EMULATION_FUNC(name) void name(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc, uintptr_t mstatus, insn_t insn)
14 void misaligned_load_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc);
15 void misaligned_store_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc);
H A Dmuldiv_emulation.c37 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
60 return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
H A Dfp_emulation.h46 else if (GET_RM(insn) > 4) return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); \
67 else if (GET_RM(insn) > 4) return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); \
H A Dminit.c222 write_csr(mepc, fn);
H A Dmentry.S123 csrr a2, mepc # a2 <- mepc
H A Dencoding.h1307 DECLARE_CSR(mepc, CSR_MEPC)

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