bbl: redirect traps to HS mode

Add ns16750 driver for ariane.

Set up PMP earlier, so it can be overridden later

Revert "Avoid writing reserved values to pmpaddr CSR"

This reverts commit 7bee30c1ff56975041ffc67cd0170d7477aba865.

All ones is no longer "reserved", so the old code is OK.

Fix the calculation for the number of interrupt enable words

The number of interrupt enable words should be the number of devices
divided by the number of bits per word (not the number of bytes per
word) and it should round up.

Without this fix, when using a larger number of interrupts,
the user will see a number of errors in qemu of the form:

plic: invalid register write: %08x

Signed-off-by: Logan Gunthorpe <logang@deltatee.com>

Avoid writing reserved values to pmpaddr CSR

minit: Move pmp setup code to a separate function to avoid duplicating code

Currently it's being used by both enter_supervisor_mode and enter_machine_mode

bbl: boot payload in machine mode when --enable-boot-machine is passed

Properly license all nontrivial files

RISC-V: Support separate firmware and kernel payload

Support for separate firmware and kernel payload is added
by updating BBL to read optional preloaded kernel address
attributes from device-tree using a similar mechanism to
that used to pass init ramdisk addresses to linux kernel.

chosen {
riscv,kernel-start = <0x00000000 0x80200000>;
riscv,kernel-end = <0x00000000 0x80590634>;
};

These attributes are added by QEMU and read by BBL when combining
-bios <firmware-image> and -kernel <kernel-image> options. e.g.

$ qemu-system-riscv64 -machine virt -bios bbl -kernel vmlinux

With this change, bbl can be compiled without --with-payload
and the dummy payload alignment is altered to make the memory
footprint of the firmware-only bbl smaller. The dummy payload
message is updated to indicate the alternative load method.

This load method could also be supported by a first stage boot
loader that reads seperate firmware and kernel from SPI flash.
The main advantage of this new mechanism is that it eases kernel
development by avoiding the riscv-pk packaging step after kernel
builds, makes building per repository artefacts for CI simpler,
and mimics bootloaders on other platforms that can load a kernel
image file directly. Ultimately BBL should use an SPI driver to
load the kernel image however this mechanism supports use cases
such such as QEMU's -bios, -kernel and -initrd options following
examples from other platforms that pass kernel entry to firmware
via device-tree.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>

machine,minit: initialize emulated FCSR in enter_supervisor_mode() (#106)

* If BBL emulates the FPU, the trap handler will load emulated FCSR from
x0's save slot into tp. The emulated FCSR should be initialized, else
the field of rounding mode will contain garbage codes. This will
lead to raising SIGABRT for a user mode program which tries to print a
floating point variable. In glibc, __printf_fp_l() (defined in
riscv-glibc/stdio-common/printf_fp.c) will call round_away() (defined
in riscv-glibc/include/rounding-mode.h). With a garbage rounding mode
in emulated FCSR, round_away() may call abort().

Fix for missing supervisor mode when running on E51 (#96)

The E51 core on the U54-MC lacks supervisor mode, thus the plic_s_ie and plic_s_thresh are NULL when running on this core. This adds checks for this case.

minit: insert printm as work-around for a race condition

Reboot does not work reliably without this.

Remove the repeating bitmask of medeleg register (#74)

Add a 16550 UART driver to back the SBI console

QEMU currently provides the console via HTIF and the SBI. That's a bit
messy because BBL polls for serial input, which means that typing too
quickly loses characters. While QEMU has a standard 16550 device model,
there's no way to have two consoles share the console in QEMU (as they'd
step all over each other) so that means we can't have both the HTIF
console and the 16550 console.

With this patch, QEMU can be changed to use a 16650 instead of the HTIF
for serial output. Linux will use the SBI for early printk support
(which is fine, polling for output is stable) and then swap over as soon
as it detects the UART. When Linux swaps it prints out the whole
history, but there's probably a way to get around that. There's a few
lines that are output to both, but it appears the Linux driver is close
enough to ours that nothing catastrophic happens -- there's not much to
the device, so hopefully that pans out on real hardware too.

Once Linux swaps over to natively using the driver we get reliable
console input. If you don't have the in-kernel driver then Linux never
swaps over and keeps using the SBI console just like before.

Remove the platform interface

We now automatically detect everything that the platform interface used
to be used for, so it's now obsolete!

Check if we have extensions before using them

Initialize the UART first

Without this I can't get printf to show me debug info during early boot.

Detect harts that can't boot Linux instead of hard-coding them

This checks to see if a hart can't boot Linux by looking for a
compatible "mmu-type" field. If the hart can't boot Linux, then bbl
masks it off.

finisher: support terminating sifive devices simulation (#61)

Move DISABLED_HART_MASK to the platform

Some platforms can't boot Linux on all the harts. This commit allows
platforms to define the set of harts that should be prevented from
booting past BBL. This is essentially just a new mechanism for defining
the DISABLED_HART_MASK.

Remove num_harts; use hart_mask exclusively

Rename HART_MASK to DISABLED_HART_MASK to clarify polarity

bbl: prevent named cores from booting

Remove SBI console printm to speed up PK simulation

clint: move hart wakeup till after all FDT parsing

The clint was wiping out information discovered by the plic.
Initialize hart stacks as they are discovered.
Then fill in clint+plic info
Then wake the harts.

New PMP encoding

plic: discovered via fdt

uart: add physical device driver

Separate page faults from physical memory access exceptions

Set up PMPs, permissively for now

SBI: a0+a1 hold hartid+dtb pointer between boot loader stages

machine: add FDT parser

Don't rely on config string for basic functionality

New counter-enable scheme

https://github.com/riscv/riscv-isa-manual/issues/10

Fix PK boot

Don't block for acks on console writes

WIP towards ECALL interface for SBI

Incorporate sptbr/sfence.vma changes

Use __riscv_flen macro to detect FP support

Attempt to disable FPU if using no-FPU pk/bbl

Don't let other harts boot before HLS is initialized

Use IPIs to signal them.

Initialize timecmp; add PRCI test

PLIC registers are 32-bit, not 16-bit

Clear IPIs using MMIO, not mip CSR

Remove debug printfs

Add preliminary support for the interrupt controller

ERET -> MRET

Remove mtime/mtimecmp

Misc improvements

Make num_harts a uintptr_t

Making it a uint32_t is a false economy.

Refactor pk, bbl, machine into separate libraries

Yuck.